| Branch | Commit message | Author | Age | |
|---|---|---|---|---|
| master | new pinout and led | root | 7 years | |
| Age | Commit message | Author | Files | Lines |
| 2018-05-29 | new pinout and ledHEADmaster | root | 2 | -7/+18 |
| 2018-05-29 | Just one freq supported | Rob Langley | 3 | -28/+31 |
| 2018-05-17 | only use +ve clock edges | fishsoupisgood | 1 | -1/+1 |
| 2018-05-17 | only mute if all mute | root | 1 | -1/+1 |
| 2018-05-17 | minor fixes, make clock simulator happy and fix AS programming | root | 5 | -18/+11 |
| 2018-05-17 | tidy | James | 8 | -256/+256 |
| 2018-05-17 | working 3 detectors with parity checks | root | 3 | -1/+206 |
| 2018-05-17 | working 3 detectors with parity checks | root | 6 | -154/+177 |
| 2018-05-17 | add silence detection | fishsoupisgood | 6 | -104/+96 |
| 2018-05-17 | first version for rob - supports only 44.1kHz | fishsoupisgood | 16 | -0/+1580 |
| Clone | ||||
| git://git.panaceas.org/misc/rob_spdif | ||||
| ssh://git@git.panaceas.org/git/misc/rob_spdif | ||||
 |
index : misc/rob_spdif | |
| rob spdif hdl | James |
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