aboutsummaryrefslogtreecommitdiffstats
path: root/tests/various
Commit message (Expand)AuthorAgeFilesLines
* Merge pull request #2328 from YosysHQ/mwk/opt_dff-cleanupclairexen2020-08-201-143/+0
|\
| * peepopt: Remove now-redundant dffmux pattern.Marcelina Kościelnicka2020-08-071-143/+0
* | Merge branch 'const-func-block-var' of https://github.com/zachjs/yosys into z...Claire Wolf2020-08-182-0/+24
|\ \
| * | Allow blocks with declarations within constant functionsZachary Snow2020-07-252-0/+24
* | | Merge pull request #2281 from zachjs/const-realclairexen2020-08-181-0/+12
|\ \ \ | |_|/ |/| |
| * | Allow reals as constant function parametersZachary Snow2020-07-191-0/+12
| |/
* | Merge pull request #2306 from YosysHQ/mwk/equiv_induct-undefclairexen2020-07-281-0/+35
|\ \
| * | equiv_induct: Fix up assumption for $equiv cells in -undef mode.Marcelina Kościelnicka2020-07-271-0/+35
| |/
* / Avoid generating wires for function args which are constantZachary Snow2020-07-242-0/+45
|/
* Revert "Revert PRs #2203 and #2244."Kamil Rakoczy2020-07-104-0/+49
* Revert PRs #2203 and #2244.whitequark2020-07-094-49/+0
* Add logic param and integer bad syntax testsKamil Rakoczy2020-07-063-0/+21
* Merge pull request #2203 from antmicro/fix-grammarclairexen2020-07-011-0/+28
|\
| * Add signed/unsigned testsKamil Rakoczy2020-06-261-0/+28
* | Allow constant function calls in for loops and generate if and caseZachary Snow2020-06-292-0/+76
|/
* Use C++11 final/override keywords.whitequark2020-06-181-1/+1
* Merge pull request #2077 from YosysHQ/eddie/abc9_dff_improveEddie Hung2020-06-041-1/+2
|\
| * abc9_ops: -reintegrate use SigMap to remove (* init *) from $_DFF_[NP]_Eddie Hung2020-05-291-1/+2
* | Merge pull request #2080 from YosysHQ/eddie/fix_test_warningsEddie Hung2020-06-033-4/+4
|\ \
| * | tests: fix some test warningsEddie Hung2020-05-253-4/+4
| |/
* / printattrs: Add test.Alberto Gonzalez2020-05-271-0/+14
|/
* xaiger: add testcaseEddie Hung2020-05-241-0/+13
* abc9: preserve $_DFF_?_.Q's (* init *); rely on clean to remove itEddie Hung2020-05-141-3/+8
* abc9: not enough to techmap_fail on (* init=1 *), hide them using $__Eddie Hung2020-05-141-2/+21
* abc9: add flop boxes to basic $_DFF_P_ and $_DFF_N_ tooEddie Hung2020-05-141-5/+7
* Merge pull request #2028 from zachjs/masterEddie Hung2020-05-062-0/+17
|\
| * verilog: allow null gen-if then blockZachary Snow2020-05-062-0/+17
* | Merge pull request #2024 from YosysHQ/eddie/primitive_srcEddie Hung2020-05-051-0/+16
|\ \
| * | tests: add tests for primitives' srcEddie Hung2020-05-041-0/+16
| |/
* / verilog: fix specify src attributeEddie Hung2020-05-041-0/+6
|/
* test: add test for #2014Eddie Hung2020-05-021-0/+12
* Merge pull request #1973 from YosysHQ/eddie/fix1966Eddie Hung2020-04-221-1/+3
|\
| * tests: use `yosys-config --datdir` instead of hard-codedEddie Hung2020-04-221-1/+3
* | Merge pull request #1950 from YosysHQ/eddie/design_importEddie Hung2020-04-222-5/+22
|\ \
| * | design: add testEddie Hung2020-04-162-5/+22
| |/
* | Merge pull request #1976 from YosysHQ/dave/fix-sim-constClaire Wolf2020-04-221-0/+13
|\ \
| * | sim: Fix handling of constant-connected cell inputs at startupDavid Shah2020-04-211-0/+13
| |/
* | hierarchy: Convert positional parameters to named.Marcelina Kościelnicka2020-04-211-0/+23
* | Merge pull request #1851 from YosysHQ/claire/bitselwriteClaire Wolf2020-04-2113-0/+1224
|\ \
| * | Remove '-ignore_unknown_cells' option from 'sat'Eddie Hung2020-04-201-6/+6
| * | Simplify test case scriptEddie Hung2020-04-201-30/+17
| * | Modifications of tests as per Eddie's requestdiego2020-04-2013-0/+1237
* | | abc9: add testcase reduced from #1970Eddie Hung2020-04-201-0/+19
| |/ |/|
* | tests: add design -delete testsEddie Hung2020-04-162-0/+18
* | ast: Fix handling of identifiers in the global scopeDavid Shah2020-04-161-0/+18
|/
* tests: add testcases from #1876Eddie Hung2020-04-141-0/+60
* tests: add a quick plugin testEddie Hung2020-04-093-0/+22
* Add support for SystemVerilog-style `define to Verilog frontendRupert Swarbrick2020-03-274-0/+50
* Add test for abc9+mince issueDavid Shah2020-03-201-0/+17
* fsm_extract: Initialize celltypes with full design.Marcin Kościelnicki2020-03-191-0/+33
generated by cgit v1.2.3 (git 2.25.1) at 2025-02-06 10:58:07 +0000