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Author
Age
Files
Lines
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synth_xilinx: Support init values on Spartan 6 flip-flops properly.
Marcin Kościelnicki
2019-09-07
5
-53
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+219
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Resolve TODO with pin assignments for SRL*
Eddie Hung
2019-09-04
1
-4
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+2
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Add comments
Eddie Hung
2019-09-02
1
-1
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+9
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Rename box
Eddie Hung
2019-09-02
1
-1
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+1
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Merge remote-tracking branch 'origin/master' into xaig_arrival
Eddie Hung
2019-09-02
2
-7
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+8
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Fix TRELLIS_FF simulation model
Miodrag Milanovic
2019-08-31
1
-6
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+7
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ecp5_gsr: Fix typo
David Shah
2019-08-31
1
-1
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+1
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Merge remote-tracking branch 'origin/master' into eddie/xilinx_srl
Eddie Hung
2019-08-30
13
-136
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+180
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Remove trailing space
Eddie Hung
2019-08-30
1
-2
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+2
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Merge remote-tracking branch 'origin/master' into xaig_arrival
Eddie Hung
2019-08-30
10
-109
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+150
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ecp5: Add simulation equivalence check for Diamond FF implementations
David Shah
2019-08-30
3
-0
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+87
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ecp5: deduplicate Diamond FD/IFS/OFS/IO primitives.
whitequark
2019-08-30
5
-95
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+60
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ecp5: allow (and enable by default) GSR on FD/IFS/OFS primitives.
whitequark
2019-08-30
1
-35
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+20
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ecp5: add missing FD primitives.
whitequark
2019-08-30
2
-72
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+76
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ecp5: fix CEMUX on IFS/OFS primitives.
whitequark
2019-08-30
2
-18
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+18
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Rename boxes too
Eddie Hung
2019-08-29
3
-3
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+3
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Do not overwrite LUT param
Eddie Hung
2019-08-28
1
-1
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+0
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Use a dummy box file if none specified
Eddie Hung
2019-08-28
2
-0
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+2
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Comment out SB_MAC16 arrival time for now, need to handle all its modes
Eddie Hung
2019-08-28
1
-1
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+1
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Add arrival for SB_MAC16.O
Eddie Hung
2019-08-28
1
-0
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+1
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Add arrival times for U
Eddie Hung
2019-08-28
1
-0
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+26
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LX -> LP
Eddie Hung
2019-08-28
1
-1
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+1
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Round not floor
Eddie Hung
2019-08-28
1
-21
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+21
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Add LP timings
Eddie Hung
2019-08-28
1
-0
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+26
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LX -> LP
Eddie Hung
2019-08-28
1
-1
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+1
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Do not overwrite LUT param
Eddie Hung
2019-08-28
1
-1
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+0
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Merge remote-tracking branch 'origin/eddie/fix_carry_wrapper' into xaig_arrival
Eddie Hung
2019-08-28
2
-1
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+48
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Trailing comma
Eddie Hung
2019-08-28
1
-1
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+1
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Adapt to $__ICE40_CARRY_WRAPPER
Eddie Hung
2019-08-28
1
-3
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+5
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Revert "Remove $__ICE40_FULL_ADDER handling from ice40_opt; cannot reason with"
Eddie Hung
2019-08-28
1
-0
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+45
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Add arrival times for HX devices
Eddie Hung
2019-08-28
1
-21
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+114
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Specify ice40 family to cells_sim.v using define
Eddie Hung
2019-08-28
1
-1
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+8
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Merge remote-tracking branch 'origin/eddie/fix_carry_wrapper' into xaig_arrival
Eddie Hung
2019-08-28
5
-68
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+20
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Remove $__ICE40_FULL_ADDER handling from ice40_opt; cannot reason with
Eddie Hung
2019-08-28
1
-45
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+0
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Update box size and timings
Eddie Hung
2019-08-28
3
-12
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+12
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Update to new $__ICE40_CARRY_WRAPPER
Eddie Hung
2019-08-28
1
-11
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+8
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Merge branch 'eddie/xilinx_srl' into xaig_arrival
Eddie Hung
2019-08-28
1
-15
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+22
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Merge remote-tracking branch 'origin/master' into eddie/xilinx_srl
Eddie Hung
2019-08-28
13
-248
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+835
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Merge branch 'master' into eddie/xilinx_srl
Eddie Hung
2019-08-26
1
-0
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+8
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xilinx_srl now copes with word-level flops $dff{,e}
Eddie Hung
2019-08-23
1
-8
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+3
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Merge remote-tracking branch 'origin/master' into eddie/xilinx_srl
Eddie Hung
2019-08-23
3
-15
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+30
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Merge remote-tracking branch 'origin/master' into eddie/xilinx_srl
Eddie Hung
2019-08-22
14
-92
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+961
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Add variable length support to xilinx_srl
Eddie Hung
2019-08-21
1
-4
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+3
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abc9 to perform new 'map_ffs' before 'map_luts'
Eddie Hung
2019-08-21
1
-3
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+18
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Add init support
Eddie Hung
2019-08-21
1
-1
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+1
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Merge remote-tracking branch 'origin/master' into xaig_arrival
Eddie Hung
2019-08-28
13
-249
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+865
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Add (* clkbuf_sink *) to SRLC16E, reorder ports to match vendor
Eddie Hung
2019-08-28
1
-3
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+8
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Merge pull request #1332 from YosysHQ/dave/ecp5gsr
David Shah
2019-08-28
6
-54
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+212
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ecp5: Add GSR support
David Shah
2019-08-27
6
-54
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+212
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xilinx: Add SRLC16E primitive.
Marcin Kościelnicki
2019-08-27
1
-1
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+21
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