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Author
Age
Files
Lines
*
Clean whitespace and permissions in techlibs/intel
Larry Doolittle
2017-10-05
21
-190
/
+190
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Rename "write_verilog -nobasenradix" to "write_verilog -decimal"
Clifford Wolf
2017-10-03
1
-4
/
+1
*
Tested and working altsyncarm without init files
dh73
2017-10-01
2
-57
/
+59
*
Adding Cyclone IV (E, GX), Arria 10, Cyclone V and LPM functions (ALTPLL and ...
dh73
2017-10-01
30
-727
/
+2954
*
Add first draft of eASIC back-end
Clifford Wolf
2017-09-29
2
-0
/
+191
*
Fix synth_ice40 doc regarding -top default
Clifford Wolf
2017-09-29
1
-1
/
+1
*
Added RESET_TO_MAX parameter to $__COUNT_ cell. Cannot yet be extracted.
Andrew Zonenberg
2017-09-14
2
-2
/
+4
*
Initial support for extraction of counters with clock enable
Andrew Zonenberg
2017-09-14
1
-21
/
+65
*
Merge pull request #406 from azonenberg/coolrunner-techmap
Clifford Wolf
2017-09-02
2
-18
/
+125
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coolrunner2: Finish fixing special-use p-terms
Robert Ou
2017-09-01
1
-8
/
+20
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coolrunner2: Generate a feed-through AND term when necessary
Robert Ou
2017-09-01
1
-13
/
+31
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coolrunner2: Initial fixes for special p-terms
Robert Ou
2017-09-01
2
-1
/
+81
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coolrunner2: Fix mapping of flip-flops
Robert Ou
2017-09-01
1
-1
/
+0
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*
coolrunner2: Combine some for loops together
Robert Ou
2017-09-01
1
-16
/
+14
*
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Fixed typo in error message
Andrew Zonenberg
2017-09-01
1
-1
/
+1
*
|
Added blackbox $__COUNT_ cell model
Andrew Zonenberg
2017-09-01
2
-0
/
+18
*
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Refactoring: moved modules still in cells_sim to cells_sim_wip
Andrew Zonenberg
2017-09-01
3
-136
/
+138
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/
*
Merge branch 'master' of https://github.com/cliffordwolf/yosys into counter-e...
Andrew Zonenberg
2017-08-30
1
-34
/
+34
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*
Reformatted GP_COUNTx_ADV resets to avoid Yosys thinking that they're multi-e...
Andrew Zonenberg
2017-08-28
1
-34
/
+34
*
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extract_counter: Minor changes requested to comply with upstream policy, fixe...
Andrew Zonenberg
2017-08-30
2
-4
/
+4
*
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Finished refactoring counter extraction to be nice and generic. Implemented t...
Andrew Zonenberg
2017-08-28
2
-1
/
+69
*
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Refactoring: Renamed greenpak4_counters pass to extract_counter, moved it to ...
Andrew Zonenberg
2017-08-28
3
-515
/
+1
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/
*
Fixed bug causing GP_SPI model to not synthesize
Andrew Zonenberg
2017-08-27
1
-2
/
+2
*
Fixed more issues with GreenPAK counter sim models
Andrew Zonenberg
2017-08-15
1
-19
/
+23
*
Updated PGEN model to have level triggered reset (matches actual hardware beh...
Andrew Zonenberg
2017-08-15
1
-4
/
+4
*
Fixed bug in GP_COUNTx model
Andrew Zonenberg
2017-08-15
1
-7
/
+12
*
Fixed bug where GP_COUNTx_ADV would wrap even when KEEP was high
Andrew Zonenberg
2017-08-15
1
-47
/
+47
*
Merge pull request #381 from azonenberg/countfix
Clifford Wolf
2017-08-14
4
-504
/
+900
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Fixed typo in GP_COUNT8 sim model
Andrew Zonenberg
2017-08-14
1
-1
/
+1
|
*
Fixed typo in error message
Andrew Zonenberg
2017-08-14
1
-1
/
+1
|
*
Changed LEVEL resets for GP_COUNTx to be properly synthesizeable
Andrew Zonenberg
2017-08-14
1
-48
/
+60
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*
Changed LEVEL resets to be edge triggered anyway
Andrew Zonenberg
2017-08-14
1
-4
/
+4
|
*
Added level-triggered reset support to GP_COUNTx simulation models
Andrew Zonenberg
2017-08-14
1
-2
/
+68
|
*
Fixed undeclared "count" in GP_COUNT8_ADV
Andrew Zonenberg
2017-08-14
1
-0
/
+2
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*
Fixed undeclared "count" in GP_COUNT14_ADV
Andrew Zonenberg
2017-08-14
1
-0
/
+2
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*
Fixed typo in last commit
Andrew Zonenberg
2017-08-14
1
-3
/
+3
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*
Finished initial GP_COUNT8/14/8_ADV/14_ADV sim models. Don't support clock di...
Andrew Zonenberg
2017-08-14
2
-37
/
+293
|
*
Fixed typo in COUNT8 model
Andrew Zonenberg
2017-08-14
1
-2
/
+2
|
*
Moved GP_POR out of digital cells b/c it has delays
Andrew Zonenberg
2017-08-14
2
-21
/
+21
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*
Improved cells_sim_digital model for GP_COUNT8
Andrew Zonenberg
2017-08-14
2
-40
/
+75
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*
Refactored GreenPAK4 cells_sim into cells_sim_ams and cells_sim_digital
Andrew Zonenberg
2017-08-14
4
-428
/
+451
*
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coolrunner2: Add INVERT parameter to some BUFGs
Robert Ou
2017-08-14
1
-2
/
+6
*
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coolrunner2: Add FFs with clock enable to cells_sim.v
Robert Ou
2017-08-14
1
-0
/
+60
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/
*
Add techlibs/xilinx/lut2lut.v
Clifford Wolf
2017-07-10
2
-0
/
+66
*
Fix some c++ clang compiler errors
Clifford Wolf
2017-07-03
1
-3
/
+3
*
Apply minor coding style changes to coolrunner2 target
Clifford Wolf
2017-07-03
2
-1
/
+1
*
Merge pull request #352 from rqou/master
Clifford Wolf
2017-07-03
6
-0
/
+645
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*
coolrunner2: Add a few more primitives
Robert Ou
2017-06-25
1
-0
/
+110
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*
coolrunner2: Initial mapping of latches
Robert Ou
2017-06-25
4
-0
/
+63
|
*
coolrunner2: Initial mapping of DFFs
Robert Ou
2017-06-25
4
-0
/
+76
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