| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | Do not perform width-checks for DSP48E1 which is much more complicated | Eddie Hung | 2019-09-19 | 1 | -11/+0 |
| * | Cleanup xilinx_dsp too | Eddie Hung | 2019-09-19 | 1 | -37/+28 |
| * | Cleanup | Eddie Hung | 2019-09-19 | 1 | -8/+4 |
| * | Check overflow condition is power of 2 without using int32 | Eddie Hung | 2019-09-18 | 1 | -2/+2 |
| * | Add support for overflow using pattern detector | Eddie Hung | 2019-09-18 | 1 | -1/+12 |
| * | Separate dffrstmux from dffcemux, fix typos | Eddie Hung | 2019-09-18 | 1 | -20/+32 |
| * | Add support for A1 and B1 registers | Eddie Hung | 2019-09-11 | 1 | -5/+65 |
| * | Rename {A,B} -> {A2,B2} | Eddie Hung | 2019-09-11 | 1 | -19/+20 |
| * | Make unextend a udata | Eddie Hung | 2019-09-11 | 1 | -3/+2 |
| * | Add support for A/B/C/D/AD reset | Eddie Hung | 2019-09-11 | 1 | -56/+103 |
| * | Add support for RSTM | Eddie Hung | 2019-09-11 | 1 | -64/+88 |
| * | Only pack out registers if \init is zero or x; then remove \init from PREG | Eddie Hung | 2019-09-10 | 1 | -4/+8 |
| * | Add support for RSTP | Eddie Hung | 2019-09-10 | 1 | -22/+58 |
| * | enpol -> cepol | Eddie Hung | 2019-09-10 | 1 | -46/+48 |
| * | d?ffmux -> d?ffcemux | Eddie Hung | 2019-09-10 | 1 | -34/+33 |
| * | Refactor MREG and PREG to out_dffe subpattern | Eddie Hung | 2019-09-10 | 1 | -155/+122 |
| * | Only trim sigM if USE_MULT; only look for ffM then too | Eddie Hung | 2019-09-09 | 1 | -9/+13 |
| * | Rename | Eddie Hung | 2019-09-09 | 1 | -27/+27 |
| * | Oops | Eddie Hung | 2019-09-09 | 1 | -2/+1 |
| * | Tidy up | Eddie Hung | 2019-09-09 | 1 | -6/+5 |
| * | Refactor using subpattern in_dffe | Eddie Hung | 2019-09-09 | 1 | -240/+146 |
| * | Pack CREG | Eddie Hung | 2019-09-06 | 1 | -19/+70 |
| * | Use unextend lambda | Eddie Hung | 2019-09-06 | 1 | -19/+18 |
| * | Fix ffP just like ffPmux | Eddie Hung | 2019-09-06 | 1 | -4/+4 |
| * | Perform D replacement properly | Eddie Hung | 2019-09-06 | 1 | -5/+0 |
| * | Add support for DREG | Eddie Hung | 2019-09-06 | 1 | -2/+57 |
| * | Fine tune nusers when postAdd | Eddie Hung | 2019-09-06 | 1 | -3/+3 |
| * | Fix macc and mul tests | Eddie Hung | 2019-09-06 | 1 | -3/+17 |
| * | Fix enable polarity | Eddie Hung | 2019-09-06 | 1 | -12/+12 |
| * | Add support for pre-adder and AD register | Eddie Hung | 2019-09-06 | 1 | -3/+98 |
| * | Use more index patterns | Eddie Hung | 2019-09-06 | 1 | -15/+19 |
| * | Fix ffPmux to cope with offset | Eddie Hung | 2019-09-06 | 1 | -12/+34 |
| * | Simplify filter expressions | Eddie Hung | 2019-09-06 | 1 | -6/+12 |
| * | Fix nusers condition in ffP | Eddie Hung | 2019-09-06 | 1 | -2/+5 |
| * | Check adder is <= 48 bits before packing | Eddie Hung | 2019-09-06 | 1 | -4/+5 |
| * | Check nusers for M and P enable muxes | Eddie Hung | 2019-09-06 | 1 | -2/+17 |
| * | More nusers() checks for A and B enable muxes | Eddie Hung | 2019-09-06 | 1 | -14/+27 |
| * | Sensitive to CEB CEM CEP polarity | Eddie Hung | 2019-09-05 | 1 | -16/+19 |
| * | ffAmuxAB -> ffAenpol | Eddie Hung | 2019-09-05 | 1 | -4/+6 |
| * | Do not check signedness of post-adder (assume taken care of by DSP) | Eddie Hung | 2019-09-05 | 1 | -1/+0 |
| * | Use filter instead of index; support wide enable muxes | Eddie Hung | 2019-09-05 | 1 | -4/+8 |
| * | Do not make ff[MP]mux semioptional, use sigmap | Eddie Hung | 2019-09-05 | 1 | -3/+6 |
| * | Add support for CEP | Eddie Hung | 2019-09-05 | 1 | -2/+20 |
| * | Add support for CEB, remove check on nusers | Eddie Hung | 2019-09-05 | 1 | -8/+20 |
| * | Cleanup | Eddie Hung | 2019-09-05 | 1 | -5/+2 |
| * | Support CEA | Eddie Hung | 2019-09-05 | 1 | -3/+23 |
| * | Get rid of sigBset too | Eddie Hung | 2019-09-04 | 1 | -8/+10 |
| * | Get rid of sigAset | Eddie Hung | 2019-09-04 | 1 | -10/+14 |
| * | Get rid of sigPused | Eddie Hung | 2019-09-04 | 1 | -14/+13 |
| * | Compute sigP properly | Eddie Hung | 2019-09-04 | 1 | -1/+1 |
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index : iCE40/yosys | |
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