Commit message (Collapse) | Author | Age | Files | Lines | |
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* | Renamed SIZE() to GetSize() because of name collision on Win32 | Clifford Wolf | 2014-10-10 | 4 | -113/+113 |
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* | sat encoding for exclusive $pmux ctrl inputs in "share" pass | Clifford Wolf | 2014-10-03 | 1 | -4/+16 |
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* | added resource sharing of $macc cells | Clifford Wolf | 2014-10-03 | 1 | -3/+261 |
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* | Added $_BUF_ cell type | Clifford Wolf | 2014-10-03 | 1 | -2/+2 |
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* | remove buffers in opt_clean | Clifford Wolf | 2014-10-03 | 1 | -0/+13 |
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* | resource sharing of $alu cells | Clifford Wolf | 2014-10-03 | 1 | -3/+21 |
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* | Added support for "keep" on modules | Clifford Wolf | 2014-09-29 | 2 | -2/+2 |
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* | namespace Yosys | Clifford Wolf | 2014-09-27 | 8 | -17/+45 |
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* | Re-enabled assert for new logic loops in "share" pass | Clifford Wolf | 2014-09-21 | 1 | -4/+1 |
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* | Various improvements regarding logic loops in "share" results | Clifford Wolf | 2014-09-21 | 1 | -37/+108 |
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* | Logic loop bugfix for "share" pass | Clifford Wolf | 2014-09-21 | 1 | -3/+7 |
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* | Added "share -limit" | Clifford Wolf | 2014-09-21 | 1 | -1/+13 |
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* | Still loop bug in "share": changed assert to warning | Clifford Wolf | 2014-09-21 | 1 | -13/+25 |
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* | Do not introduce new logic loops in "share" | Clifford Wolf | 2014-09-21 | 1 | -6/+47 |
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* | Assert on new logic loops in "share" pass | Clifford Wolf | 2014-09-21 | 1 | -0/+48 |
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* | Fixed wreduce $shiftx handling | Clifford Wolf | 2014-09-15 | 1 | -1/+1 |
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* | Cleanup in wreduce | Clifford Wolf | 2014-09-14 | 1 | -11/+8 |
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* | Corrected spelling mistakes found by lintian | Ruben Undheim | 2014-09-06 | 1 | -2/+2 |
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* | Fixed "opt_const -fine" for $pos cells | Clifford Wolf | 2014-09-04 | 1 | -9/+4 |
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* | Removed $bu0 cell type | Clifford Wolf | 2014-09-04 | 3 | -10/+7 |
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* | Moved "share" and "wreduce" to passes/opt/ | Clifford Wolf | 2014-09-01 | 3 | -0/+1342 |
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* | Using std::vector<RTLIL::State> instead of RTLIL::Const for ↵ | Clifford Wolf | 2014-09-01 | 1 | -1/+1 |
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* | Added design->scratchpad | Clifford Wolf | 2014-08-30 | 8 | -64/+19 |
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* | Optimize shift ops with constant rhs in opt_const | Clifford Wolf | 2014-08-24 | 1 | -0/+35 |
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* | Added some additional log messages to opt_const | Clifford Wolf | 2014-08-24 | 1 | -1/+10 |
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* | Renamed toposort.h to utils.h | Clifford Wolf | 2014-08-17 | 1 | -1/+1 |
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* | Added "opt -fast" | Clifford Wolf | 2014-08-16 | 1 | -19/+45 |
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* | Renamed $_INV_ cell type to $_NOT_ | Clifford Wolf | 2014-08-15 | 1 | -6/+6 |
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* | More idstring sort_by_* helpers and fixed tpl ordering in techmap | Clifford Wolf | 2014-08-15 | 1 | -2/+2 |
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* | RIP $safe_pmux | Clifford Wolf | 2014-08-14 | 3 | -3/+2 |
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* | Fixed a performance bug in opt_reduce | Clifford Wolf | 2014-08-02 | 1 | -2/+6 |
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* | More cleanups related to RTLIL::IdString usage | Clifford Wolf | 2014-08-02 | 4 | -29/+30 |
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* | Replaced sha1 implementation | Clifford Wolf | 2014-08-01 | 2 | -7/+1 |
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* | Renamed port access function on RTLIL::Cell, added param access functions | Clifford Wolf | 2014-07-31 | 5 | -170/+170 |
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* | Added $shift and $shiftx cell types (needed for correct part select behavior) | Clifford Wolf | 2014-07-29 | 1 | -7/+9 |
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* | Using log_assert() instead of assert() | Clifford Wolf | 2014-07-28 | 5 | -7/+2 |
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* | Added SigPool::check(bit) | Clifford Wolf | 2014-07-27 | 1 | -2/+2 |
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* | Fixed bug in opt_clean | Clifford Wolf | 2014-07-27 | 1 | -1/+1 |
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* | Improved performance of opt_const on large modules | Clifford Wolf | 2014-07-27 | 1 | -29/+54 |
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* | Fixed a bug in opt_clean and some RTLIL API usage cleanups | Clifford Wolf | 2014-07-27 | 2 | -13/+14 |
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* | Using new obj iterator API in a few places | Clifford Wolf | 2014-07-27 | 1 | -12/+11 |
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* | Refactoring: Renamed RTLIL::Design::modules to modules_ | Clifford Wolf | 2014-07-27 | 6 | -7/+7 |
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* | Refactoring: Renamed RTLIL::Module::cells to cells_ | Clifford Wolf | 2014-07-27 | 6 | -18/+18 |
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* | Refactoring: Renamed RTLIL::Module::wires to wires_ | Clifford Wolf | 2014-07-27 | 5 | -9/+9 |
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* | Changed a lot of code to the new RTLIL::Wire constructors | Clifford Wolf | 2014-07-26 | 1 | -6/+10 |
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* | More RTLIL::Cell API usage cleanups | Clifford Wolf | 2014-07-26 | 1 | -1/+1 |
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* | Added RTLIL::Cell::has(portname) | Clifford Wolf | 2014-07-26 | 1 | -2/+2 |
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* | Manual fixes for new cell connections API | Clifford Wolf | 2014-07-26 | 4 | -24/+32 |
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* | Changed users of cell->connections_ to the new API (sed command) | Clifford Wolf | 2014-07-26 | 6 | -195/+195 |
| | | | | | | | | | git grep -l 'connections_' | xargs sed -i -r -e ' s/(->|\.)connections_\["([^"]*)"\] = (.*);/\1set("\2", \3);/g; s/(->|\.)connections_\["([^"]*)"\]/\1get("\2")/g; s/(->|\.)connections_.at\("([^"]*)"\)/\1get("\2")/g; s/(->|\.)connections_.push_back/\1connect/g; s/(->|\.)connections_/\1connections()/g;' | ||||
* | Renamed RTLIL::{Module,Cell}::connections to connections_ | Clifford Wolf | 2014-07-26 | 6 | -195/+195 |
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