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* opt_expr: Fix mul/div/mod by POT patterns to support >= 32 bits.Marcelina Kościelnicka2021-06-092-0/+35
* Fixing old e-mail addresses and deadnamesClaire Xenia Wolf2021-06-0826-27/+27
* kernel/mem: Recognize some deprecated memory port configs.Marcelina Kościelnicka2021-06-011-0/+10
* Make a few passes auto-call Mem::narrow instead of rejecting wide ports.Marcelina Kościelnicka2021-05-281-0/+3
* kernel/mem: Add helpers for write port widening.Marcelina Kościelnicka2021-05-272-0/+57
* kernel/mem: Add sub_addr helpers.Marcelina Kościelnicka2021-05-262-20/+30
* kernel/mem: Add prepare_wr_merge helper.Marcelina Kościelnicka2021-05-262-0/+27
* mem/extract_rdff: Fix "no FF made" edge case.Marcelina Kościelnicka2021-05-251-1/+4
* mem/extract_rdff: Add alternate transparency handling.Marcelina Kościelnicka2021-05-251-18/+80
* kernel/mem: Add model support for read port init value and resets.Marcelina Kościelnicka2021-05-252-4/+73
* mem/extract_rdff: Fix wire naming and wide port support.Marcelina Kościelnicka2021-05-251-6/+22
* kernel/mem: Add emulate_priority helper.Marcelina Kościelnicka2021-05-252-0/+44
* kernel/mem: Add a Mem::narrow helper to split up wide ports.Marcelina Kościelnicka2021-05-252-0/+53
* kernel/mem: Emit support for wide ports in packed mode.Marcelina Kościelnicka2021-05-251-30/+34
* kernel/mem: Add model for wide ports.Marcelina Kościelnicka2021-05-252-6/+28
* kernel/mem: Add priority_mask to model.Marcelina Kościelnicka2021-05-252-1/+47
* hashlib: Add a hash for bool.Marcelina Kościelnicka2021-05-241-0/+6
* extract_rdff: Add initvals parameter.Marcelina Kościelnicka2021-05-232-2/+3
* Add new helper class for merging FFs into cells, use for memory_dff.Marcelina Kościelnicka2021-05-234-2/+474
* kernel/rtlil: Extract some helpers for checking memory cell types.Marcelina Kościelnicka2021-05-222-0/+13
* kernel/mem: Add a check() function.Marcelina Kościelnicka2021-05-222-0/+26
* kernel/mem: defer port removal to emit()Marcelina Kościelnicka2021-05-222-18/+38
* rtlil: add const accessors for modules, wires, and cellsZachary Snow2021-03-252-0/+15
* split CodingReadme into multiple filesN. Engelhardt2021-03-221-1/+1
* Merge pull request #2681 from msinger/fix-issue2606Miodrag Milanović2021-03-191-3/+23
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| * Fix check for bad std::regex (fixes #2606)Michael Singer2021-03-171-3/+23
* | modtools: fix use-after-free of cell pointers in ModWalkerXiretza2021-03-181-0/+2
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* blackbox: Include whiteboxed modulesgatecat2021-03-172-3/+3
* Replace assert in get_reference with more useful error messageLofty2021-03-171-1/+2
* rtlil: Disallow 0-width chunks in SigSpec.Marcelina Kościelnicka2021-03-151-18/+49
* Add support for memory writes in processes.Marcelina Kościelnicka2021-03-082-0/+22
* Remove a few functions that, in fact, did not exist in the first place.Marcelina Kościelnicka2021-03-061-2/+0
* Replace assert in addModule with more useful error messageDan Ravensloft2021-03-061-1/+2
* Fix double-free on unmatched logger error patternZachary Snow2021-02-231-3/+3
* int -> boolRobert Baruch2021-02-231-2/+2
* Adds is_wire to SigBit and SigChunkRobert Baruch2021-02-231-0/+3
* verilog: significant block scoping improvementsZachary Snow2021-01-311-0/+4
* kernel/yosys.h: undef CONST on WIN32umarcor2020-12-281-2/+3
* kernel: undef Tcl macros interfering with cxxrtl.whitequark2020-12-221-0/+2
* Merge pull request #2487 from whitequark/cxxrtl-outliningwhitequark2020-12-191-1/+1
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| * kernel: make IdString::isPublic() const.whitequark2020-12-121-1/+1
* | timinginfo: Error instead of segfault on const signals.Marcelina Kościelnicka2020-12-151-2/+2
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* bugpoint: add -wires option.whitequark2020-12-071-1/+1
* tcl -h message only if YOSYS_ENABLE_TCL defined.nitz2020-11-231-0/+2
* Expose abc and data paths as globalsMiodrag Milanovic2020-11-062-14/+61
* Add new helper structures to represent memories.Marcelina Kościelnicka2020-10-212-0/+514
* add IdString::isPublic()N. Engelhardt2020-09-031-0/+2
* Replace "ILANG" with "RTLIL" everywhere.whitequark2020-08-263-10/+10
* Ensure \A_SIGNED is never used with $shiftxXiretza2020-08-181-1/+5
* Respect \A_SIGNED for $shiftXiretza2020-08-182-42/+22