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authorMarcelina Koƛcielnicka <mwk@0x04.net>2021-05-22 19:14:13 +0200
committerMarcelina Koƛcielnicka <mwk@0x04.net>2021-05-22 21:43:00 +0200
commitc4cc888b2c51a6507b73fdcde1dc61c37384105d (patch)
treed5bc86b7ae97217a242c7e1f5b6f9ad6da1e4c7d /kernel
parentc7076495f197732725456992c9a02aed9966139a (diff)
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kernel/rtlil: Extract some helpers for checking memory cell types.
There will soon be more (versioned) memory cells, so handle passes that only care if a cell is memory-related by a simple helper call instead of a hardcoded list.
Diffstat (limited to 'kernel')
-rw-r--r--kernel/rtlil.cc10
-rw-r--r--kernel/rtlil.h3
2 files changed, 13 insertions, 0 deletions
diff --git a/kernel/rtlil.cc b/kernel/rtlil.cc
index 770405720..f9ae947b6 100644
--- a/kernel/rtlil.cc
+++ b/kernel/rtlil.cc
@@ -3125,6 +3125,16 @@ void RTLIL::Cell::fixup_parameters(bool set_a_signed, bool set_b_signed)
check();
}
+bool RTLIL::Cell::has_memid() const
+{
+ return type.in(ID($memwr), ID($memrd), ID($meminit));
+}
+
+bool RTLIL::Cell::is_mem_cell() const
+{
+ return type == ID($mem) || has_memid();
+}
+
RTLIL::SigChunk::SigChunk()
{
wire = NULL;
diff --git a/kernel/rtlil.h b/kernel/rtlil.h
index 3137deb00..2f06690d1 100644
--- a/kernel/rtlil.h
+++ b/kernel/rtlil.h
@@ -1522,6 +1522,9 @@ public:
#ifdef WITH_PYTHON
static std::map<unsigned int, RTLIL::Cell*> *get_all_cells(void);
#endif
+
+ bool has_memid() const;
+ bool is_mem_cell() const;
};
struct RTLIL::CaseRule : public RTLIL::AttrObject