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authorMarcelina Koƛcielnicka <mwk@0x04.net>2021-02-23 00:21:46 +0100
committerMarcelina Koƛcielnicka <mwk@0x04.net>2021-03-08 20:16:29 +0100
commit4e03865d5bf3fafe0bd3735c88431675d53d2663 (patch)
tree7ef637bd0526b498d32386bc1c79c671a02af7f0 /kernel
parentc00a29296c8d3446c7cfe253080c7e33358219b0 (diff)
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Add support for memory writes in processes.
Diffstat (limited to 'kernel')
-rw-r--r--kernel/rtlil.cc1
-rw-r--r--kernel/rtlil.h21
2 files changed, 22 insertions, 0 deletions
diff --git a/kernel/rtlil.cc b/kernel/rtlil.cc
index 40079ffc5..c3ae5d243 100644
--- a/kernel/rtlil.cc
+++ b/kernel/rtlil.cc
@@ -4538,6 +4538,7 @@ RTLIL::SyncRule *RTLIL::SyncRule::clone() const
new_syncrule->type = type;
new_syncrule->signal = signal;
new_syncrule->actions = actions;
+ new_syncrule->mem_write_actions = mem_write_actions;
return new_syncrule;
}
diff --git a/kernel/rtlil.h b/kernel/rtlil.h
index f03f27617..10cb039d5 100644
--- a/kernel/rtlil.h
+++ b/kernel/rtlil.h
@@ -69,6 +69,7 @@ namespace RTLIL
struct SigSpec;
struct CaseRule;
struct SwitchRule;
+ struct MemWriteAction;
struct SyncRule;
struct Process;
@@ -1541,11 +1542,21 @@ struct RTLIL::SwitchRule : public RTLIL::AttrObject
RTLIL::SwitchRule *clone() const;
};
+struct RTLIL::MemWriteAction : RTLIL::AttrObject
+{
+ RTLIL::IdString memid;
+ RTLIL::SigSpec address;
+ RTLIL::SigSpec data;
+ RTLIL::SigSpec enable;
+ RTLIL::Const priority_mask;
+};
+
struct RTLIL::SyncRule
{
RTLIL::SyncType type;
RTLIL::SigSpec signal;
std::vector<RTLIL::SigSig> actions;
+ std::vector<RTLIL::MemWriteAction> mem_write_actions;
template<typename T> void rewrite_sigspecs(T &functor);
template<typename T> void rewrite_sigspecs2(T &functor);
@@ -1693,6 +1704,11 @@ void RTLIL::SyncRule::rewrite_sigspecs(T &functor)
functor(it.first);
functor(it.second);
}
+ for (auto &it : mem_write_actions) {
+ functor(it.address);
+ functor(it.data);
+ functor(it.enable);
+ }
}
template<typename T>
@@ -1702,6 +1718,11 @@ void RTLIL::SyncRule::rewrite_sigspecs2(T &functor)
for (auto &it : actions) {
functor(it.first, it.second);
}
+ for (auto &it : mem_write_actions) {
+ functor(it.address);
+ functor(it.data);
+ functor(it.enable);
+ }
}
template<typename T>