| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | Add support for PRIM_SVA_UNTIL to new SVA importer | Clifford Wolf | 2018-02-28 | 1 | -0/+27 |
| | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
| * | Add DFSM generator to verific SVA importer | Clifford Wolf | 2018-02-28 | 1 | -19/+272 |
| | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
| * | Continue refactoring of Verific SVA importer code | Clifford Wolf | 2018-02-28 | 3 | -671/+172 |
| | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
| * | Major redesign of Verific SVA importer | Clifford Wolf | 2018-02-27 | 1 | -5/+573 |
| | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
| * | Add handling of verific OPER_REDUCE_NOR | Clifford Wolf | 2018-02-26 | 1 | -0/+6 |
| | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
| * | Add handling of verific OPER_SELECTOR and OPER_WIDE_SELECTOR | Clifford Wolf | 2018-02-26 | 1 | -0/+13 |
| | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
| * | Add handling of verific OPER_NTO1MUX and OPER_WIDE_NTO1MUX | Clifford Wolf | 2018-02-26 | 1 | -0/+25 |
| | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
| * | Add "SVA syntax cheat sheet" comment to verificsva.cc | Clifford Wolf | 2018-02-26 | 1 | -0/+34 |
| | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
| * | Add Verific SVA support for ranges in repetition operator | Clifford Wolf | 2018-02-22 | 1 | -5/+26 |
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| * | Add support for SVA throughout via Verific | Clifford Wolf | 2018-02-21 | 1 | -2/+6 |
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| * | Add support for SVA sequence concatenation ranges via verific | Clifford Wolf | 2018-02-18 | 1 | -16/+124 |
| | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
| * | Add support for SVA until statements via Verific | Clifford Wolf | 2018-02-18 | 2 | -34/+119 |
| | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
| * | Move Verific SVA importer to extra C++ source file | Clifford Wolf | 2018-02-18 | 4 | -1279/+1370 |
| | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
| * | Merge Verific SVA preprocessor and SVA importer | Clifford Wolf | 2018-02-18 | 1 | -79/+44 |
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| * | Fix verific PRIM_SVA_AT handling in properties with PRIM_SVA_DISABLE_IFF | Clifford Wolf | 2018-02-15 | 1 | -1/+1 |
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| * | Fix single-bit $stable handling in verific front-end | Clifford Wolf | 2018-02-01 | 1 | -0/+22 |
| | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
| * | Add Verific attribute handling for assert/assume/cover/live/fair cells | Clifford Wolf | 2018-01-31 | 1 | -10/+16 |
| | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
| * | Fix permissions on verific vdb files | Clifford Wolf | 2018-01-28 | 1 | -0/+1 |
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| * | Fixed handling of synchronous and asynchronous assertion/assumption/cover in ↵ | Clifford Wolf | 2018-01-23 | 1 | -27/+29 |
| | | | | | | | verific bindings Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
| * | Add support for Verific PRIM_SVA_NOT properties | Clifford Wolf | 2017-12-10 | 1 | -10/+25 |
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| * | Add Verific OPER_SVA_STABLE support | Clifford Wolf | 2017-12-10 | 1 | -2/+32 |
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| * | Refactoring Verific SVA rewriter | Clifford Wolf | 2017-12-10 | 1 | -62/+70 |
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| * | Remove all PSL support code from verific.cc | Clifford Wolf | 2017-10-20 | 1 | -179/+17 |
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| * | Add "verific -vlog-libdir" | Clifford Wolf | 2017-10-13 | 1 | -0/+12 |
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| * | Add "verific -vlog-incdir" and "verific -vlog-define" | Clifford Wolf | 2017-10-13 | 1 | -0/+35 |
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| * | Update Verific README | Clifford Wolf | 2017-10-13 | 1 | -0/+7 |
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| * | Add Verific fairness/liveness support | Clifford Wolf | 2017-10-12 | 1 | -11/+32 |
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| * | Start work on pre-processor for Verific SVA properties | Clifford Wolf | 2017-10-10 | 1 | -10/+153 |
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| * | Improve handling of Verific errors | Clifford Wolf | 2017-10-05 | 1 | -11/+9 |
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| * | Improve Verific error handling, check VHDL static asserts | Clifford Wolf | 2017-10-04 | 1 | -11/+25 |
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| * | Fix nasty bug in Verific bindings | Clifford Wolf | 2017-10-04 | 1 | -1/+1 |
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| * | Add merging of "past FFs" to verific importer | Clifford Wolf | 2017-07-29 | 1 | -2/+76 |
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| * | Add minimal support for PSL in VHDL via Verific | Clifford Wolf | 2017-07-28 | 1 | -19/+155 |
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| * | Improve Verific HDL language options | Clifford Wolf | 2017-07-28 | 1 | -4/+4 |
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| * | Fix handling of non-user-declared Verific netbus | Clifford Wolf | 2017-07-28 | 1 | -2/+3 |
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| * | Improve Verific SVA importer | Clifford Wolf | 2017-07-27 | 1 | -0/+34 |
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| * | Add log_warning_noprefix() API, Use for Verific warnings and errors | Clifford Wolf | 2017-07-27 | 1 | -1/+1 |
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| * | Add "verific -import -n" and "verific -import -nosva" | Clifford Wolf | 2017-07-27 | 1 | -14/+36 |
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| * | Improve Verific SVA import: negedge and $past | Clifford Wolf | 2017-07-27 | 1 | -6/+49 |
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| * | Improve Verific SVA importer | Clifford Wolf | 2017-07-27 | 1 | -37/+58 |
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| * | Improve Verific bindings (mostly related to SVA) | Clifford Wolf | 2017-07-26 | 1 | -110/+320 |
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| * | Improve "help verific" message | Clifford Wolf | 2017-07-25 | 1 | -5/+5 |
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| * | Add "verific -extnets" | Clifford Wolf | 2017-07-25 | 1 | -23/+130 |
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| * | Improve "verific -all" handling | Clifford Wolf | 2017-07-25 | 1 | -26/+45 |
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| * | Add "verific -import -d <dump_file" | Clifford Wolf | 2017-07-24 | 1 | -6/+35 |
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| * | Add "verific -import -flatten" and "verific -import -v" | Clifford Wolf | 2017-07-24 | 1 | -107/+164 |
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| * | Add "verific -import -k" | Clifford Wolf | 2017-07-22 | 1 | -42/+51 |
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| * | Improve docs for verific bindings, add simply sby example | Clifford Wolf | 2017-07-22 | 5 | -48/+89 |
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| * | Add Verific Release information to log | Clifford Wolf | 2017-07-04 | 1 | -0/+12 |
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| * | Add support for verific mem initialization | Clifford Wolf | 2017-02-11 | 1 | -0/+38 |
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