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| * | | | Add comment with expected behavior for latches,tribuf tests;Update adffs testSergeyDegtyar2019-10-174-14/+11
| * | | | Fix latches.ys testSergeyDegtyar2019-10-171-4/+3
| * | | | Remove xilinx_ug901 tests (will be moved to yosys-tests)SergeyDegtyar2019-10-1789-2963/+0
| * | | | Add smoke tests to tests/xilinxSergeyDegtyar2019-10-1730-9/+655
| * | | | Add comments for unproven cells.SergeyDegtyar2019-10-173-2/+3
| * | | | Add tests for Xilinx UG901 examplesSergeyDegtyar2019-10-1789-0/+2962
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* | | | Merge pull request #1450 from YosysHQ/clifford/fixdffmuxClifford Wolf2019-10-165-155/+270
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| * | | | Fix dffmux peepopt init handlingClifford Wolf2019-10-162-27/+113
| * | | | Move GENERATE_PATTERN macro to separate utility headerClifford Wolf2019-10-163-128/+157
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* | | | Disable left-over log_debug in peepopt_dffmux.pmgClifford Wolf2019-10-161-1/+1
* | | | Fix parsing of .cname BLIF statementsClifford Wolf2019-10-161-1/+1
* | | | Add .blackbox support to blif front-endClifford Wolf2019-10-161-0/+6
* | | | Merge pull request #1448 from YosysHQ/daveshah1-sv-experimentsClifford Wolf2019-10-1417-20/+315
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| * \ \ \ Use "(id)" instead of "id" for types as temporary hackClifford Wolf2019-10-1417-20/+315
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| | * | | | frontends/ast: code styleDavid Shah2019-10-031-2/+1
| | * | | | sv: Improve testsDavid Shah2019-10-038-7/+30
| | * | | | sv: Fix typedefs in blocksDavid Shah2019-10-031-2/+2
| | * | | | sv: Disambiguate interface portsDavid Shah2019-10-031-3/+19
| | * | | | Update CHANGELOG and READMEDavid Shah2019-10-032-0/+3
| | * | | | sv: Add test scripts for typedefsDavid Shah2019-10-035-0/+31
| | * | | | sv: Fix memories of typedefsDavid Shah2019-10-031-1/+1
| | * | | | sv: Add %expectDavid Shah2019-10-031-0/+1
| | * | | | sv: Add support for memories of a typedefDavid Shah2019-10-032-6/+30
| | * | | | sv: Add support for memory typedefsDavid Shah2019-10-033-3/+44
| | * | | | sv: Fix typedefs in packagesDavid Shah2019-10-032-4/+21
| | * | | | sv: Fix typedef parametersDavid Shah2019-10-034-9/+70
| | * | | | sv: Switch parser to glr, prep for typedefDavid Shah2019-10-036-11/+111
* | | | | | Merge pull request #1446 from YosysHQ/dave/ecp5-ioffDavid Shah2019-10-143-8/+16
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| * | | | | ecp5: Add ECLKBRIDGECS blackboxDavid Shah2019-10-111-0/+7
| * | | | | ecp5: Add attrmvcp to copy syn_useioff to driving FFDavid Shah2019-10-101-0/+1
| * | | | | ecp5: Set syn_useioff on IO FFs to enable packingDavid Shah2019-10-101-8/+8
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* | | | | Merge pull request #1445 from YosysHQ/mwk/xilinx_ibufgMiodrag Milanović2019-10-105-33/+14
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| * | | | | xilinx: Add simulation model for IBUFG.Marcin Kościelnicki2019-10-105-33/+14
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* | | | | Revert "Add test that is expecting to fail"Eddie Hung2019-10-081-20/+0
* | | | | Revert "Be mindful that sigmap(wire) could have dupes when checking \init"Eddie Hung2019-10-081-4/+1
* | | | | Merge pull request #1432 from YosysHQ/eddie/fix1427Eddie Hung2019-10-084-50/+145
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| * | | | | Use `sat -tempinduct` and comments for why equiv_opt not sufficientEddie Hung2019-10-031-1/+8
| * | | | | Fix broken CI, check reset even for constants, trim rstmuxEddie Hung2019-10-022-25/+28
| * | | | | Fix testEddie Hung2019-10-021-2/+12
| * | | | | Merge branch 'eddie/fix_sat_init' into eddie/fix1427Eddie Hung2019-10-022-1/+24
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| | * | | | | Be mindful that sigmap(wire) could have dupes when checking \initEddie Hung2019-10-021-1/+4
| | * | | | | Add test that is expecting to failEddie Hung2019-10-021-0/+20
| * | | | | | Update testEddie Hung2019-10-021-13/+3
| * | | | | | Refactor peepopt_dffmux and be sensitive to \init when trimmingEddie Hung2019-10-021-32/+63
| * | | | | | Add testEddie Hung2019-10-021-0/+31
* | | | | | | Merge pull request #1433 from YosysHQ/eddie/equiv_opt_async2syncEddie Hung2019-10-083-13/+19
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| * | | | | | | Add -async2sync to help text as per @daveshah1Eddie Hung2019-10-041-1/+4
| * | | | | | | Restore part of docEddie Hung2019-10-031-1/+2
| * | | | | | | Disable equiv check for ice40 latchesEddie Hung2019-10-031-6/+3
| * | | | | | | Add new -async2sync optionEddie Hung2019-10-031-1/+11