| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | Merge branch 'master' into struct | Peter Crozier | 2020-06-03 | 154 | -2453/+4094 |
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| | * | Merge pull request #2080 from YosysHQ/eddie/fix_test_warnings | Eddie Hung | 2020-06-03 | 6 | -7/+7 |
| | |\ | | | | | | | tests: reduce test warnings | ||||
| | | * | tests: fix some test warnings | Eddie Hung | 2020-05-25 | 6 | -7/+7 |
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| | * | | Merge pull request #2104 from whitequark/simplify-techmap | whitequark | 2020-06-03 | 3 | -40/+8 |
| | |\ \ | | | | | | | | | techmap: simplify | ||||
| | | * | | techmap: remove dead variable. NFC. | whitequark | 2020-06-03 | 1 | -1/+0 |
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| | | * | | techmap: use C++11 default member initializers. NFC. | whitequark | 2020-06-02 | 1 | -16/+6 |
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| | | * | | techmap: simplify. | whitequark | 2020-06-02 | 1 | -7/+1 |
| | | | | | | | | | | | | | | | | | `rewrite_filename` is already called in `Frontend::extra_args`. | ||||
| | | * | | techmap: use +/techmap.v instead of an ad-hoc code generator. | whitequark | 2020-06-02 | 3 | -16/+1 |
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| | * | | Merge pull request #2102 from YosysHQ/tests_fix | clairexen | 2020-06-02 | 1 | -1/+2 |
| | |\ \ | | | | | | | | | allow range for mux test | ||||
| | | * | | allow range for mux test | Miodrag Milanovic | 2020-06-01 | 1 | -1/+2 |
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| | * | | | Merge pull request #2101 from YosysHQ/mmicko/verific_asymmetric | clairexen | 2020-06-02 | 1 | -6/+1 |
| | |\ \ \ | | |/ / | |/| | | Support asymmetric memories for verific frontend | ||||
| | | * | | Support asymmetric memories for verific frontend | Miodrag Milanovic | 2020-06-01 | 1 | -6/+1 |
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| | * | | Merge pull request #1862 from boqwxp/cleanup_techmap | clairexen | 2020-05-31 | 5 | -153/+169 |
| | |\ \ | | | | | | | | | Clean up `passes/techmap/techmap.cc` | ||||
| | | * | | kernel: Try an order-independent approach to hashing `dict`. | Alberto Gonzalez | 2020-05-19 | 1 | -5/+3 |
| | | | | | | | | | | | | | | | | | | | | | Co-Authored-By: David Shah <dave@ds0.me> Co-Authored-By: Eddie Hung <eddie@fpgeh.com> | ||||
| | | * | | kernel: Ensure `dict` always hashes to the same value given the same contents. | Alberto Gonzalez | 2020-05-14 | 1 | -3/+6 |
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| | | * | | kernel: Re-implement `dict` hash code as a `dict` member function instead of ↵ | Alberto Gonzalez | 2020-05-14 | 1 | -20/+14 |
| | | | | | | | | | | | | | | | | | a specialized template for `hash_ops`. | ||||
| | | * | | techmap: Replace naughty `const_cast<>()`s. | Alberto Gonzalez | 2020-05-14 | 1 | -2/+4 |
| | | | | | | | | | | | | | | | | | Co-Authored-By: Eddie Hung <eddie@fpgeh.com> | ||||
| | | * | | techmap: Replace pseudo-private member usage with the range accessor ↵ | Alberto Gonzalez | 2020-05-14 | 1 | -3/+3 |
| | | | | | | | | | | | | | | | | | function and some naughty `const_cast<>()`s. | ||||
| | | * | | techmap: sort celltypeMap as it determines techmap order | Eddie Hung | 2020-05-14 | 1 | -1/+5 |
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| | | * | | Replace `std::set`s using custom comparators with `pool`. | Alberto Gonzalez | 2020-05-14 | 1 | -4/+4 |
| | | | | | | | | | | | | | | | | | Co-Authored-By: Eddie Hung <eddie@fpgeh.com> | ||||
| | | * | | techmap: prefix special wires with backslash for use as IdString | Eddie Hung | 2020-05-14 | 3 | -12/+14 |
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| | | * | | Further clean up `passes/techmap/techmap.cc`. | Alberto Gonzalez | 2020-05-14 | 1 | -5/+6 |
| | | | | | | | | | | | | | | | | | Co-Authored-By: Eddie Hung <eddie@fpgeh.com> | ||||
| | | * | | Use `emplace()` for more efficient insertion into various `dict`s. | Alberto Gonzalez | 2020-05-14 | 1 | -8/+8 |
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| | | * | | Build constant bits directly rather than constructing an object and copying ↵ | Alberto Gonzalez | 2020-05-14 | 1 | -2/+5 |
| | | | | | | | | | | | | | | | | | its bits. | ||||
| | | * | | Replace `std::set` with `pool` for `cell_to_inbit` and `outbit_to_cell`. | Alberto Gonzalez | 2020-05-14 | 1 | -2/+2 |
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| | | * | | Use `emplace()` rather than `insert()`. | Alberto Gonzalez | 2020-05-14 | 1 | -1/+1 |
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| | | * | | Clean up pseudo-private member usage and ensure range iteration uses ↵ | Alberto Gonzalez | 2020-05-14 | 1 | -17/+17 |
| | | | | | | | | | | | | | | | | | references where possible to avoid unnecessary copies. | ||||
| | | * | | Clean up extraneous buffer. | Alberto Gonzalez | 2020-05-14 | 1 | -5/+2 |
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| | | * | | Replace `std::map` with `dict` for `unique_bit_id`. | Alberto Gonzalez | 2020-05-14 | 1 | -1/+1 |
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| | | * | | Replace `std::map` with `dict` for `port_new2old_map`, `port_connmap`, and ↵ | Alberto Gonzalez | 2020-05-14 | 1 | -3/+3 |
| | | | | | | | | | | | | | | | | | `cellbits_to_tplbits`. | ||||
| | | * | | Replace `std::map` with `dict` for `connbits_map`, `cell_to_inbit`, and ↵ | Alberto Gonzalez | 2020-05-14 | 1 | -3/+3 |
| | | | | | | | | | | | | | | | | | `outbit_to_cell`. | ||||
| | | * | | Replace `std::map` with `dict` for `TechmapWires` type. | Alberto Gonzalez | 2020-05-14 | 1 | -1/+1 |
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| | | * | | Replace `std::map` with `dict` for `celltypeMap`. | Alberto Gonzalez | 2020-05-14 | 1 | -3/+3 |
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| | | * | | Replace `std::set` with `pool` for `handled_cells` and `techmap_wire_names`. | Alberto Gonzalez | 2020-05-14 | 1 | -4/+4 |
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| | | * | | Replace `std::map` with `dict` for `positional_ports`. | Alberto Gonzalez | 2020-05-14 | 1 | -1/+1 |
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| | | * | | Add specialized `hash()` for type `dict` and use a `dict` instead of a ↵ | Alberto Gonzalez | 2020-05-14 | 3 | -10/+25 |
| | | | | | | | | | | | | | | | | | `std::map` for `techmap_cache` and `techmap_do_cache`. | ||||
| | | * | | Replace `std::map` with `dict` for `simplemap_mappers`. | Alberto Gonzalez | 2020-05-14 | 3 | -5/+5 |
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| | | * | | Use `nullptr` instead of `NULL` in `passes/techmap/techmap.cc`. | Alberto Gonzalez | 2020-05-14 | 1 | -10/+10 |
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| | | * | | Replace `std::string` and `RTLIL::IdString` with `IdString` in ↵ | Alberto Gonzalez | 2020-05-14 | 1 | -21/+21 |
| | | | | | | | | | | | | | | | | | | | | | | | | | `passes/techmap/techmap.cc`. Co-Authored-By: Eddie Hung <eddie@fpgeh.com> | ||||
| | | * | | Do not modify design modules while iterating over `modules()`. | Alberto Gonzalez | 2020-05-14 | 1 | -1/+4 |
| | | | | | | | | | | | | | | | | | Co-Authored-By: Eddie Hung <eddie@fpgeh.com> | ||||
| | | * | | Clean up pseudo-private member usage, superfluous `std::vector` ↵ | Alberto Gonzalez | 2020-05-14 | 1 | -76/+70 |
| | | | | | | | | | | | | | | | | | instantiation, and `RTLIL::id2cstr()` usage in `passes/techmap/techmap.cc`. | ||||
| | * | | | Merge pull request #2081 from YosysHQ/eddie/blackbox_ast | Eddie Hung | 2020-05-30 | 1 | -25/+1 |
| | |\ \ \ | | | | | | | | | | | blackbox: use Module::makeblackbox() method | ||||
| | | * | | | blackbox: re-use existing Module::makeblackbox() method | Eddie Hung | 2020-05-25 | 1 | -25/+1 |
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| | * | | | Merge pull request #2018 from boqwxp/qbfsat-timeout | clairexen | 2020-05-30 | 3 | -18/+84 |
| | |\ \ \ | | | | | | | | | | | smtbmc and qbfsat: Add timeout option to set solver timeouts for Z3, Yices, and CVC4. | ||||
| | | * | | | smtbmc: Remove superfluous `yosys-smt2-timeout` file macro. | Alberto Gonzalez | 2020-05-29 | 1 | -4/+0 |
| | | | | | | | | | | | | | | | | | | | | | Co-Authored-By: clairexen <claire@symbioticeda.com> | ||||
| | | * | | | smtbmc and qbfsat: Add timeout option to set solver timeouts for Z3, Yices, ↵ | Alberto Gonzalez | 2020-05-25 | 3 | -18/+88 |
| | | | | | | | | | | | | | | | | | | | | | and CVC4. | ||||
| | * | | | | Merge pull request #2029 from whitequark/fix-simplify-memory-sv_logic | clairexen | 2020-05-29 | 3 | -2/+11 |
| | |\ \ \ \ | | | | | | | | | | | | | ast/simplify: don't bitblast async ROMs declared as `logic` | ||||
| | | * | | | | ast/simplify: don't bitblast async ROMs declared as `logic`. | whitequark | 2020-05-05 | 3 | -2/+11 |
| | | | | | | | | | | | | | | | | | | | | | | | | | Fixes #2020. | ||||
| | * | | | | | Merge pull request #1885 from Xiretza/mod-rem-cells | clairexen | 2020-05-29 | 26 | -40/+540 |
| | |\ \ \ \ \ | | | | | | | | | | | | | | | Fix modulo/remainder semantics | ||||
| | | * | | | | | Document division and modulo cells | Xiretza | 2020-05-28 | 1 | -0/+23 |
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index : iCE40/yosys | |
| clone of https://github.com/YosysHQ/yosys |
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