iCE40/ghdl - [no description]

	Commit message (Expand)	Author	Age	Files	Lines
*	synth: handle more 2008 aggregates	Tristan Gingold	2023-01-03	1	-6/+32
*	synth-vhdl_aggr: minor renaming	Tristan Gingold	2023-01-03	1	-8/+9
*	synth: improve support of vhdl-08 arrays	Tristan Gingold	2023-01-02	1	-1/+1
*	synth: handle null-range loops	Tristan Gingold	2022-09-28	1	-1/+3
*	synth: rework error procedure, always pass the instance	Tristan Gingold	2022-09-25	1	-17/+25
*	synth: use areapools	Tristan Gingold	2022-09-02	1	-3/+3
*	synth: factorize code for synth_subtype_conversion	Tristan Gingold	2022-08-21	1	-4/+4
*	elab-vhdl_objtypes: use value_offsets for record elements offset.	Tristan Gingold	2022-05-24	1	-1/+1
*	synth: use same elements for unbounded arrays and vectors	Tristan Gingold	2022-05-22	1	-1/+1
*	synth: also use one-dimensional unbounded arrays for objtypes	Tristan Gingold	2022-05-22	1	-1/+1
*	synth: use unidimentional arrays in type_acc. Factorize code.	Tristan Gingold	2022-05-22	1	-11/+24
*	synth-vhdl_aggr: fix mismatch. Fix #1962	Tristan Gingold	2022-02-05	1	-1/+6
*	synth: do full elaboration before synthesis	Tristan Gingold	2021-11-01	1	-3/+4
*	synth: file renaming for decls, expr, insts and stmts.	Tristan Gingold	2021-04-28	1	-3/+3
*	synth: extract synth-memtype from synth-objtypes	Tristan Gingold	2021-04-21	1	-0/+1
*	synth: refactoring (synth.aggr -> synth.vhdl_aggr)	Tristan Gingold	2021-04-16	1	-0/+537