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| author | Tristan Gingold <tgingold@free.fr> | 2022-05-22 09:41:11 +0200 |
|---|---|---|
| committer | Tristan Gingold <tgingold@free.fr> | 2022-05-22 09:41:11 +0200 |
| commit | d010636f5bb5cf00f6f26fd6e83a21b8a1dd5c2a (patch) | |
| tree | 2d4f49db512c37a2ca289b9936d08c16c9897367 /src/synth/synth-vhdl_aggr.adb | |
| parent | 946320e0984df406f0e3c50cd3db0fb49df5ec9b (diff) | |
| download | ghdl-d010636f5bb5cf00f6f26fd6e83a21b8a1dd5c2a.tar.gz ghdl-d010636f5bb5cf00f6f26fd6e83a21b8a1dd5c2a.tar.bz2 ghdl-d010636f5bb5cf00f6f26fd6e83a21b8a1dd5c2a.zip | |
synth: also use one-dimensional unbounded arrays for objtypes
Diffstat (limited to 'src/synth/synth-vhdl_aggr.adb')
| -rw-r--r-- | src/synth/synth-vhdl_aggr.adb | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/synth/synth-vhdl_aggr.adb b/src/synth/synth-vhdl_aggr.adb index 2115fde07..0694a99b0 100644 --- a/src/synth/synth-vhdl_aggr.adb +++ b/src/synth/synth-vhdl_aggr.adb @@ -138,7 +138,7 @@ package body Synth.Vhdl_Aggr is begin Nbr_Els := Nbr_Els + 1; - if Typ.Kind = Type_Vector or else Typ.Alast then + if Typ.Alast then pragma Assert (Dim = Strides'Last); Val := Synth_Expression_With_Type (Syn_Inst, Value, El_Typ); Val := Synth_Subtype_Conversion (Ctxt, Val, El_Typ, False, Value); |