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authorTristan Gingold <tgingold@free.fr>2021-04-28 17:37:26 +0200
committerTristan Gingold <tgingold@free.fr>2021-04-28 17:37:26 +0200
commite3a82f2e6894155cc030680332f31db6f79aba28 (patch)
tree664593aa4fbb76c2f8c8a38d13d31b9335f99472 /src/synth/synth-vhdl_aggr.adb
parenta7334f5837fcc417173254707bc8acfc84120b47 (diff)
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synth: file renaming for decls, expr, insts and stmts.
Diffstat (limited to 'src/synth/synth-vhdl_aggr.adb')
-rw-r--r--src/synth/synth-vhdl_aggr.adb6
1 files changed, 3 insertions, 3 deletions
diff --git a/src/synth/synth-vhdl_aggr.adb b/src/synth/synth-vhdl_aggr.adb
index 250ebb1aa..fe7e95058 100644
--- a/src/synth/synth-vhdl_aggr.adb
+++ b/src/synth/synth-vhdl_aggr.adb
@@ -28,9 +28,9 @@ with Vhdl.Utils; use Vhdl.Utils;
with Synth.Memtype; use Synth.Memtype;
with Synth.Errors; use Synth.Errors;
-with Synth.Expr; use Synth.Expr;
-with Synth.Stmts; use Synth.Stmts;
-with Synth.Decls; use Synth.Decls;
+with Synth.Vhdl_Expr; use Synth.Vhdl_Expr;
+with Synth.Vhdl_Stmts; use Synth.Vhdl_Stmts;
+with Synth.Vhdl_Decls; use Synth.Vhdl_Decls;
package body Synth.Vhdl_Aggr is
type Stride_Array is array (Dim_Type range <>) of Nat32;