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authorTristan Gingold <tgingold@free.fr>2022-08-21 14:10:08 +0200
committerTristan Gingold <tgingold@free.fr>2022-08-21 14:10:08 +0200
commit00ca739542639e5de0578bf1e62f04e380772f52 (patch)
tree4cf24896c94e2f28ada3528485257c1eab110f85 /src/synth/synth-vhdl_aggr.adb
parent78b29a7a47636cb2fda1112f3e2ec8167c3e7d66 (diff)
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synth: factorize code for synth_subtype_conversion
Diffstat (limited to 'src/synth/synth-vhdl_aggr.adb')
-rw-r--r--src/synth/synth-vhdl_aggr.adb8
1 files changed, 4 insertions, 4 deletions
diff --git a/src/synth/synth-vhdl_aggr.adb b/src/synth/synth-vhdl_aggr.adb
index bb355726e..bd198e944 100644
--- a/src/synth/synth-vhdl_aggr.adb
+++ b/src/synth/synth-vhdl_aggr.adb
@@ -121,7 +121,6 @@ package body Synth.Vhdl_Aggr is
Const_P : out Boolean;
Err_P : out boolean)
is
- Ctxt : constant Context_Acc := Get_Build (Syn_Inst);
Bound : constant Bound_Type := Get_Array_Bound (Typ);
El_Typ : constant Type_Acc := Get_Array_Element (Typ);
Stride : constant Nat32 := Strides (Dim);
@@ -141,7 +140,8 @@ package body Synth.Vhdl_Aggr is
if Typ.Alast then
pragma Assert (Dim = Strides'Last);
Val := Synth_Expression_With_Type (Syn_Inst, Value, El_Typ);
- Val := Synth_Subtype_Conversion (Ctxt, Val, El_Typ, False, Value);
+ Val := Synth_Subtype_Conversion
+ (Syn_Inst, Val, El_Typ, False, Value);
pragma Assert (Res (Pos) = No_Valtyp);
Res (Pos) := Val;
if Val = No_Valtyp then
@@ -345,7 +345,6 @@ package body Synth.Vhdl_Aggr is
Err_P : out Boolean;
Const_P : out Boolean)
is
- Ctxt : constant Context_Acc := Get_Build (Syn_Inst);
Value : Node;
Assoc : Node;
Pos : Nat32;
@@ -361,7 +360,8 @@ package body Synth.Vhdl_Aggr is
if Const_P and not Is_Static (Val.Val) then
Const_P := False;
end if;
- Val := Synth_Subtype_Conversion (Ctxt, Val, El_Type, False, Value);
+ Val := Synth_Subtype_Conversion
+ (Syn_Inst, Val, El_Type, False, Value);
if Val = No_Valtyp then
Err_P := True;
return;