| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | Updated readmeHEADmaster | Mike Stirling | 2016-01-13 | 1 | -1/+43 |
| | | |||||
| * | Updated license text | Mike Stirling | 2011-09-18 | 12 | -53/+95 |
| | | |||||
| * | ...and the rest of the previous commit | Mike Stirling | 2011-09-18 | 2 | -59/+37 |
| | | |||||
| * | Fixed synthesis options for shared pins. Removed test UART. Updated Flash ↵ | Mike Stirling | 2011-09-18 | 1 | -233/+0 |
| | | | | | addressing to match new scheme shared with Spectrum. | ||||
| * | Added license notice to the top of all source files | Mike Stirling | 2011-08-21 | 12 | -4/+300 |
| | | |||||
| * | Switched to external MOS ROM (in flash) and removed MOS and EHBASIC ROMs ↵ | Mike Stirling | 2011-08-07 | 5 | -381/+1 |
| | | | | | from project | ||||
| * | Swapped DFS ROM to original Acorn version and added two composite ROM ↵ | Mike Stirling | 2011-08-07 | 3 | -63/+48 |
| | | | | | images, one with real DFS and one with MMBEEB ROM. Re-registered a few signals to help meet timing (still not quite there). | ||||
| * | Get rid of an inferred latch in 6522. Doesn't seem to break anything! | Mike Stirling | 2011-08-07 | 1 | -4/+4 |
| | | |||||
| * | Fixed cursor generation in VIDPROC. Added SAA5050 for MODE 7 support. ↵ | Mike Stirling | 2011-08-07 | 6 | -15/+649 |
| | | | | | Added tools for generating SAA5050 character ROM. | ||||
| * | Clamp line_counter to an even number when in interlace sync+video mode. ↵ | Mike Stirling | 2011-08-06 | 1 | -2/+3 |
| | | | | | Fixes bug where vsync would disappear half the time when switching into this mode. | ||||
| * | Added utility to generate character ROM for SAA5050. Small fix to video ↵ | Mike Stirling | 2011-08-06 | 1 | -3/+3 |
| | | | | | ULA. Added MMBEEB SD card DFS ROM. | ||||
| * | Added cursor support and teletext pass-through to video ULA. Fixed a couple ↵ | Mike Stirling | 2011-08-04 | 2 | -5/+56 |
| | | | | | of cursor bugs in the CRTC. | ||||
| * | Fixed missing gate in DISEN which meant that blank lines in modes 3 and 6 ↵ | Mike Stirling | 2011-08-02 | 3 | -6/+30 |
| | | | | | weren't blank. Hopefully fixed handling of interlaced sync+video mode in CRTC ready for SAA5050 implementation. | ||||
| * | Added sound generator support and interface to WM8731L audio codec. Uses ↵ | Mike Stirling | 2011-07-31 | 20 | -9/+2386 |
| | | | | | SN76489 implementation from FPGA arcade. | ||||
| * | Added pin definitions for SD card interface. Fixed bug in 6522 ↵ | Mike Stirling | 2011-07-31 | 4 | -27/+50 |
| | | | | | shift-register implementation (shift on CB1 rising edge should occur even in SR disabled mode). Works with MMBEEB SD card interface ROM. | ||||
| * | Keyboard now working (needed to loop back slow bus outputs to inputs on ↵ | Mike Stirling | 2011-07-30 | 5 | -40/+66 |
| | | | | | system VIA). Added aux input to debugger for display of arbitrary hex values. Removed test IFR output from 6522 | ||||
| * | Updated T65 CPU core from ↵ | Mike Stirling | 2011-07-29 | 2 | -9/+22 |
| | | | | | https://svn.pacedev.net/repos/pace/sw/src/component/cpu/t65/ to fix BRK bug. Changed default breakpoint and watchpoint addresses to 0xFFFF. | ||||
| * | Work in progress. Added PS/2 keyboard interface, hardware debugger. ↵ | Mike Stirling | 2011-07-29 | 9 | -85/+967 |
| | | | | | Interrupt test output to 6522 (remove later). Fixed error in pin assignments that blocked access to Flash chip select. Added reading sideways ROMs from external Flash (all but BASIC masked off for now). | ||||
| * | Boots to "BBC Computer" message with dummy keyboard and interrupts disabled ↵ | Mike Stirling | 2011-07-25 | 4 | -51/+437 |
| | | | | | (something is keeping the interrupt permanently asserted). Need to add paged ROMs in Flash (no more room in the FPGA). | ||||
| * | Register 6522 reads so that data is available outside of "phase 2" cycles, ↵ | Mike Stirling | 2011-07-17 | 1 | -31/+34 |
| | | | | | otherwise CPU can't see it | ||||
| * | Work in progress: Added MOS6522 from www.fpgaarcade.com. Added simple_uart ↵ | Mike Stirling | 2011-07-17 | 6 | -18/+1613 |
| | | | | | component in "FRED" for test purposes and added alternative EHBASIC ROM for debugging | ||||
| * | Fixed SRAM routing logic | Mike Stirling | 2011-07-16 | 4 | -20/+43 |
| | | |||||
| * | Added top-level, PLL, MOS ROM and CRTC. CRTC seems to behave strangely ↵ | Mike Stirling | 2011-07-16 | 8 | -0/+1407 |
| | | | | | although the design is passing timing. | ||||
| * | Initial commit. Some modules imported from experimental 6502 platform. ↵ | Mike Stirling | 2011-07-12 | 10 | -0/+3575 |
| Project added for Quartus 9.1 | |||||
 |
index : bbc-b/fpga-bbc | |
| bbc-b fpga implementation from GH | James |
| aboutsummaryrefslogtreecommitdiffstats |