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authorMike Stirling <opensource@mikestirling.co.uk>2011-07-29 23:32:53 +0100
committerMike Stirling <opensource@mikestirling.co.uk>2011-07-29 23:32:53 +0100
commit22139faee8f39c1a2d5e03f35d586fcf3eda472b (patch)
treeec436d78e73a05cb42de6abdacdb357163e9c417
parentabb341bccf06bca03f56d2bc7612b2f81721b454 (diff)
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Updated T65 CPU core from https://svn.pacedev.net/repos/pace/sw/src/component/cpu/t65/ to fix BRK bug. Changed default breakpoint and watchpoint addresses to 0xFFFF.
-rw-r--r--T65/T65.vhd27
-rw-r--r--debugger.vhd4
2 files changed, 22 insertions, 9 deletions
diff --git a/T65/T65.vhd b/T65/T65.vhd
index f02a5b6..4a21d79 100644
--- a/T65/T65.vhd
+++ b/T65/T65.vhd
@@ -182,7 +182,7 @@ begin
XF <= XF_i;
ML_n <= '0' when IR(7 downto 6) /= "10" and IR(2 downto 1) = "11" and MCycle(2 downto 1) /= "00" else '1';
VP_n <= '0' when IRQCycle = '1' and (MCycle = "101" or MCycle = "110") else '1';
- VDA <= '1' when Set_Addr_To_r /= "000" else '0'; -- Incorrect !!!!!!!!!!!!
+ VDA <= '1' when Set_Addr_To_r /= "00" else '0'; -- Incorrect !!!!!!!!!!!!
VPA <= '1' when Jump(1) = '0' else '0'; -- Incorrect !!!!!!!!!!!!
mcode : T65_MCode
@@ -370,13 +370,26 @@ begin
when others =>
end case;
end if;
- if IR = "00000000" and MCycle = "011" and RstCycle = '0' and NMICycle = '0' and IRQCycle = '0' then
- P(Flag_B) <= '1';
- end if;
- if IR = "00000000" and MCycle = "100" and RstCycle = '0' and (NMICycle = '1' or IRQCycle = '1') then
- P(Flag_I) <= '1';
- P(Flag_B) <= B_o;
+
+ --if IR = "00000000" and MCycle = "011" and RstCycle = '0' and NMICycle = '0' and IRQCycle = '0' then
+ -- P(Flag_B) <= '1';
+ --end if;
+ --if IR = "00000000" and MCycle = "100" and RstCycle = '0' and (NMICycle = '1' or IRQCycle = '1') then
+ -- P(Flag_I) <= '1';
+ -- P(Flag_B) <= B_o;
+ --end if;
+
+ -- B=1 always on the 6502
+ P(Flag_B) <= '1';
+ if IR = "00000000" and RstCycle = '0' and (NMICycle = '1' or IRQCycle = '1') then
+ if MCycle = "011" then
+ -- B=0 in *copy* of P pushed onto the stack
+ P(Flag_B) <= '0';
+ elsif MCycle = "100" then
+ P(Flag_I) <= '1';
+ end if;
end if;
+
if SO_n_o = '1' and SO_n = '0' then
P(Flag_V) <= '1';
end if;
diff --git a/debugger.vhd b/debugger.vhd
index 0a4219d..bf82850 100644
--- a/debugger.vhd
+++ b/debugger.vhd
@@ -168,7 +168,7 @@ begin
process(CLOCK,nRESET)
begin
if nRESET = '0' then
- watchpoint <= (others => '0');
+ watchpoint <= (others => '1');
elsif rising_edge(CLOCK) and mode = modeWatch then
if r_set_n = '1' and nSET = '0' then
-- Increment selected digit on each button press
@@ -187,7 +187,7 @@ begin
process(CLOCK,nRESET)
begin
if nRESET = '0' then
- breakpoint <= (others => '0');
+ breakpoint <= (others => '1');
elsif rising_edge(CLOCK) and mode = modeBreak then
if r_set_n = '1' and nSET = '0' then
-- Increment selected digit on each button press