iCE40/yosys - [no description]

	Commit message (Expand)	Author	Age	Files	Lines
*	Fix compile error	Eddie Hung	2019-08-20	2	-8/+14
*	Merge remote-tracking branch 'origin/master' into xc7dsp	Eddie Hung	2019-08-20	10	-90/+872
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\| *	Merge branch 'master' into clifford/pmgen	Clifford Wolf	2019-08-20	1	-3/+1
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\| \| *	Ignore all generated headers for pmgen pass	Miodrag Milanovic	2019-08-18	1	-2/+1
\| * \|	Merge branch 'master' of github.com:YosysHQ/yosys into clifford/pmgen	Clifford Wolf	2019-08-19	3	-2/+109
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\| \| *	Revert "Merge pull request #1280 from YosysHQ/revert-1266-eddie/ice40_full_ad...	Eddie Hung	2019-08-12	3	-0/+111
\| * \|	Refactor pmgen rollback mechanism	Clifford Wolf	2019-08-17	1	-32/+21
\| * \|	Improvements in "test_pmgen -generate"	Clifford Wolf	2019-08-17	1	-3/+23
\| * \|	Add pmgen "fallthrough" statement	Clifford Wolf	2019-08-17	2	-3/+17
\| * \|	Add help() call	Eddie Hung	2019-08-16	1	-0/+1
\| * \|	Minor bugfix in "test_pmgen -generate"	Clifford Wolf	2019-08-16	1	-1/+1
\| * \|	Add pmgen finish statement, return number of matches	Clifford Wolf	2019-08-16	4	-82/+116
\| * \|	Redesign pmgen backtracking for recursive matching	Clifford Wolf	2019-08-16	2	-33/+38
\| * \|	Add pmgen "generate" feature	Clifford Wolf	2019-08-16	3	-13/+208
\| * \|	Refactor demo_reduce into test_pmgen	Clifford Wolf	2019-08-16	4	-14/+83
\| * \|	Add doc for pmgen semioptional statement, Add pmgen changes to CHANGELOG	Clifford Wolf	2019-08-15	1	-0/+3
\| * \|	Update pmgen documentation	Clifford Wolf	2019-08-15	1	-4/+58
\| * \|	Change pmgen default rule to reject, switch peepopt behavior to accept	Clifford Wolf	2019-08-15	5	-7/+5
\| * \|	Add demo_reduce pass to demonstrace recursive pattern matching	Clifford Wolf	2019-08-15	4	-0/+187
\| * \|	Improvements in pmgen for recursive patterns	Clifford Wolf	2019-08-15	4	-26/+132
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\| *	Revert "Wrap SB_LUT+SB_CARRY into $__ICE40_CARRY_WRAPPER"	David Shah	2019-08-10	3	-111/+0
\| *	Add ice40_wrapcarry pass, rename $__ICE40_FULL_ADDER -> CARRY_WRAPPER	Eddie Hung	2019-08-07	3	-0/+111
* \|	xilinx_dsp to be sensitive to keep attribute	Eddie Hung	2019-08-15	1	-1/+14
* \|	Simplify	Eddie Hung	2019-08-15	1	-4/+2
* \|	ffH -> ffFJKG	Eddie Hung	2019-08-15	2	-15/+15
* \|	Fixes for reverting SigSpec helper functions	Eddie Hung	2019-08-14	2	-10/+14
* \|	Perform C -> PCIN optimisation after pattern matcher	Eddie Hung	2019-08-13	2	-19/+72
* \|	Revert changes to RTLIL::SigSpec methods	Eddie Hung	2019-08-13	2	-7/+30
* \|	Rename to XilinxDspPass	Eddie Hung	2019-08-13	1	-3/+3
* \|	Check nusers of DSP output, not whole flop	Eddie Hung	2019-08-09	1	-1/+1
* \|	Improve ice40_dsp for non-fully-32-bit adders	Eddie Hung	2019-08-09	1	-3/+8
* \|	Another filter -> if	Eddie Hung	2019-08-09	1	-2/+2
* \|	Cleanup	Eddie Hung	2019-08-09	2	-18/+18
* \|	Pack partial-product adder DSP48E1 packing	Eddie Hung	2019-08-09	2	-10/+79
* \|	Fix check	Eddie Hung	2019-08-09	1	-4/+6
* \|	Revert "Fix typo"	Eddie Hung	2019-08-09	1	-1/+1
* \|	Remove muxY and ffY for now	Eddie Hung	2019-08-08	2	-35/+33
* \|	Rework ice40_dsp to map to SB_MAC16 earlier, and check before packing	Eddie Hung	2019-08-08	3	-39/+83
* \|	Only pack registers if {A,B,P}REG = 0, do not pack $dffe	Eddie Hung	2019-08-08	1	-3/+6
* \|	Disable $dffe	Eddie Hung	2019-08-08	1	-8/+8
* \|	Fix compile error	Eddie Hung	2019-08-07	1	-2/+2
* \|	Do not SigSpec::extract() beyond bounds	Eddie Hung	2019-08-07	2	-8/+10
* \|	Do not pack registers if (* keep *)	Eddie Hung	2019-08-07	1	-0/+20
* \|	Add comment about supporting $dffe in ice40_dsp	Eddie Hung	2019-08-01	1	-0/+1
* \|	Pack P register properly	Eddie Hung	2019-08-01	1	-2/+4
* \|	Cope with sign extension in mul2dsp	Eddie Hung	2019-08-01	2	-14/+14
* \|	CO is sign extension only if signed multiplier	Eddie Hung	2019-08-01	1	-1/+6
* \|	Fix typo	Eddie Hung	2019-08-01	1	-1/+1
* \|	Restore old CO behaviour	Eddie Hung	2019-07-31	1	-6/+7
* \|	Pop the CO bit from O	Eddie Hung	2019-07-26	1	-1/+3