| Commit message (Expand) | Author | Age | Files | Lines |
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* | Add $allconst and $allseq cell types | Clifford Wolf | 2018-02-23 | 1 | -0/+24 |
* | coolrunner2: Move LOC attributes onto the IO cells | Robert Ou | 2018-01-17 | 1 | -0/+2 |
* | Add "dffinit -highlow" and fix synth_intel | Clifford Wolf | 2018-01-09 | 1 | -1/+1 |
* | Fix minor typo in "prep" help message | Clifford Wolf | 2017-12-19 | 1 | -1/+1 |
* | Fix port names in SB_IO_OD | Graham Edgecombe | 2017-12-10 | 1 | -18/+18 |
* | Remove trailing comma from SB_IO_OD port list | Graham Edgecombe | 2017-12-10 | 1 | -1/+1 |
* | Fix spelling in -vpr help for synth_ice40 | Tim Ansell | 2017-12-08 | 1 | -1/+1 |
* | Merge pull request #462 from daveshah1/up5k | Clifford Wolf | 2017-11-28 | 1 | -0/+263 |
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| * | Add remaining UltraPlus cells to ice40 techlib | David Shah | 2017-11-28 | 1 | -0/+263 |
* | | Merge pull request #455 from daveshah1/up5k | Clifford Wolf | 2017-11-18 | 1 | -0/+103 |
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| * | Remove unnecessary keep attributes | David Shah | 2017-11-18 | 1 | -5/+5 |
| * | Merge branch 'master' into up5k | David Shah | 2017-11-17 | 2 | -5/+29 |
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| * | | Add some UltraPlus cells to ice40 techlib | David Shah | 2017-11-16 | 1 | -0/+103 |
* | | | Merge pull request #453 from dh73/master | Clifford Wolf | 2017-11-18 | 10 | -5/+312 |
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| * | | Initial Cyclone 10 support | dh73 | 2017-11-08 | 5 | -1/+308 |
| * | | Organizing Speedster file names | dh73 | 2017-11-08 | 5 | -4/+4 |
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* / | Add "synth_ice40 -vpr" | Clifford Wolf | 2017-11-16 | 2 | -5/+29 |
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* | Clean whitespace and permissions in techlibs/intel | Larry Doolittle | 2017-10-05 | 21 | -190/+190 |
* | Rename "write_verilog -nobasenradix" to "write_verilog -decimal" | Clifford Wolf | 2017-10-03 | 1 | -4/+1 |
* | Tested and working altsyncarm without init files | dh73 | 2017-10-01 | 2 | -57/+59 |
* | Adding Cyclone IV (E, GX), Arria 10, Cyclone V and LPM functions (ALTPLL and ... | dh73 | 2017-10-01 | 30 | -727/+2954 |
* | Add first draft of eASIC back-end | Clifford Wolf | 2017-09-29 | 2 | -0/+191 |
* | Fix synth_ice40 doc regarding -top default | Clifford Wolf | 2017-09-29 | 1 | -1/+1 |
* | Added RESET_TO_MAX parameter to $__COUNT_ cell. Cannot yet be extracted. | Andrew Zonenberg | 2017-09-14 | 2 | -2/+4 |
* | Initial support for extraction of counters with clock enable | Andrew Zonenberg | 2017-09-14 | 1 | -21/+65 |
* | Merge pull request #406 from azonenberg/coolrunner-techmap | Clifford Wolf | 2017-09-02 | 2 | -18/+125 |
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| * | coolrunner2: Finish fixing special-use p-terms | Robert Ou | 2017-09-01 | 1 | -8/+20 |
| * | coolrunner2: Generate a feed-through AND term when necessary | Robert Ou | 2017-09-01 | 1 | -13/+31 |
| * | coolrunner2: Initial fixes for special p-terms | Robert Ou | 2017-09-01 | 2 | -1/+81 |
| * | coolrunner2: Fix mapping of flip-flops | Robert Ou | 2017-09-01 | 1 | -1/+0 |
| * | coolrunner2: Combine some for loops together | Robert Ou | 2017-09-01 | 1 | -16/+14 |
* | | Fixed typo in error message | Andrew Zonenberg | 2017-09-01 | 1 | -1/+1 |
* | | Added blackbox $__COUNT_ cell model | Andrew Zonenberg | 2017-09-01 | 2 | -0/+18 |
* | | Refactoring: moved modules still in cells_sim to cells_sim_wip | Andrew Zonenberg | 2017-09-01 | 3 | -136/+138 |
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* | Merge branch 'master' of https://github.com/cliffordwolf/yosys into counter-e... | Andrew Zonenberg | 2017-08-30 | 1 | -34/+34 |
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| * | Reformatted GP_COUNTx_ADV resets to avoid Yosys thinking that they're multi-e... | Andrew Zonenberg | 2017-08-28 | 1 | -34/+34 |
* | | extract_counter: Minor changes requested to comply with upstream policy, fixe... | Andrew Zonenberg | 2017-08-30 | 2 | -4/+4 |
* | | Finished refactoring counter extraction to be nice and generic. Implemented t... | Andrew Zonenberg | 2017-08-28 | 2 | -1/+69 |
* | | Refactoring: Renamed greenpak4_counters pass to extract_counter, moved it to ... | Andrew Zonenberg | 2017-08-28 | 3 | -515/+1 |
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* | Fixed bug causing GP_SPI model to not synthesize | Andrew Zonenberg | 2017-08-27 | 1 | -2/+2 |
* | Fixed more issues with GreenPAK counter sim models | Andrew Zonenberg | 2017-08-15 | 1 | -19/+23 |
* | Updated PGEN model to have level triggered reset (matches actual hardware beh... | Andrew Zonenberg | 2017-08-15 | 1 | -4/+4 |
* | Fixed bug in GP_COUNTx model | Andrew Zonenberg | 2017-08-15 | 1 | -7/+12 |
* | Fixed bug where GP_COUNTx_ADV would wrap even when KEEP was high | Andrew Zonenberg | 2017-08-15 | 1 | -47/+47 |
* | Merge pull request #381 from azonenberg/countfix | Clifford Wolf | 2017-08-14 | 4 | -504/+900 |
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| * | Fixed typo in GP_COUNT8 sim model | Andrew Zonenberg | 2017-08-14 | 1 | -1/+1 |
| * | Fixed typo in error message | Andrew Zonenberg | 2017-08-14 | 1 | -1/+1 |
| * | Changed LEVEL resets for GP_COUNTx to be properly synthesizeable | Andrew Zonenberg | 2017-08-14 | 1 | -48/+60 |
| * | Changed LEVEL resets to be edge triggered anyway | Andrew Zonenberg | 2017-08-14 | 1 | -4/+4 |
| * | Added level-triggered reset support to GP_COUNTx simulation models | Andrew Zonenberg | 2017-08-14 | 1 | -2/+68 |