| Commit message (Expand) | Author | Age | Files | Lines |
... | |
* | | shiftx2mux: fix select out of bounds | Eddie Hung | 2020-02-05 | 1 | -1/+2 |
|/ |
|
* | Merge remote-tracking branch 'origin/master' into eddie/shiftx2mux | Eddie Hung | 2020-02-05 | 24 | -359/+1041 |
|\ |
|
| * | Merge pull request #1661 from YosysHQ/eddie/abc9_required | Eddie Hung | 2020-02-05 | 7 | -144/+375 |
| |\ |
|
| | * | Merge branch 'eddie/abc9_refactor' into eddie/abc9_required | Eddie Hung | 2020-01-27 | 5 | -129/+99 |
| | |\ |
|
| | * \ | Merge remote-tracking branch 'origin/eddie/abc9_refactor' into eddie/abc9_req... | Eddie Hung | 2020-01-15 | 1 | -1/+1 |
| | |\ \ |
|
| | * | | | abc9_ops: -write_box is empty, output a dummy box to prevent ABC error | Eddie Hung | 2020-01-15 | 2 | -2/+0 |
| | * | | | abc9_ops: generate flop box ids, add abc9_required to FD* cells | Eddie Hung | 2020-01-14 | 1 | -12/+45 |
| | * | | | Merge remote-tracking branch 'origin/eddie/abc9_refactor' into eddie/abc9_req... | Eddie Hung | 2020-01-14 | 3 | -23/+30 |
| | |\ \ \ |
|
| | * \ \ \ | Merge remote-tracking branch 'origin/eddie/abc9_refactor' into eddie/abc9_req... | Eddie Hung | 2020-01-12 | 2 | -3/+2 |
| | |\ \ \ \ |
|
| | * | | | | | Add abc9_required to DSP48E1.{A,B,C,D,PCIN} | Eddie Hung | 2020-01-10 | 1 | -38/+117 |
| | * | | | | | abc9_ops -prep_times: generate flop boxes from abc9_required attr | Eddie Hung | 2020-01-10 | 1 | -61/+0 |
| | * | | | | | Add abc9_ops -check, -prep_times, -write_box for required times | Eddie Hung | 2020-01-10 | 1 | -0/+5 |
| | * | | | | | Merge remote-tracking branch 'origin/eddie/abc9_refactor' into eddie/abc9_req... | Eddie Hung | 2020-01-08 | 6 | -1676/+520 |
| | |\ \ \ \ \ |
|
| | * \ \ \ \ \ | Merge remote-tracking branch 'origin/eddie/abc9_refactor' into xaig_arrival_r... | Eddie Hung | 2020-01-06 | 39 | -656/+1189 |
| | |\ \ \ \ \ \ |
|
| | | * \ \ \ \ \ | Merge remote-tracking branch 'origin/xaig_dff' into eddie/abc9_refactor | Eddie Hung | 2020-01-02 | 12 | -756/+722 |
| | | |\ \ \ \ \ \ |
|
| | | * \ \ \ \ \ \ | Merge remote-tracking branch 'origin/master' into eddie/abc9_refactor | Eddie Hung | 2020-01-02 | 27 | -91/+118 |
| | | |\ \ \ \ \ \ \ |
|
| | | * \ \ \ \ \ \ \ | Merge remote-tracking branch 'origin/xaig_dff' into eddie/abc9_refactor | Eddie Hung | 2019-12-30 | 6 | -121/+673 |
| | | |\ \ \ \ \ \ \ \ |
|
| | * | | | | | | | | | | Consistency | Eddie Hung | 2019-12-27 | 1 | -1/+1 |
| | * | | | | | | | | | | Update some abc9_arrival times, add abc9_required times | Eddie Hung | 2019-12-27 | 3 | -24/+220 |
| * | | | | | | | | | | | Add opt_lut_ins pass. (#1673) | Marcelina Kościelnicka | 2020-02-03 | 3 | -0/+3 |
| * | | | | | | | | | | | xilinx: use RAM32M/RAM64M for memories with two read ports | Marcin Kościelnicki | 2020-02-02 | 1 | -2/+2 |
| * | | | | | | | | | | | Merge pull request #1659 from YosysHQ/clifford/experimental | Claire Wolf | 2020-01-29 | 1 | -1/+1 |
| |\ \ \ \ \ \ \ \ \ \ \ |
|
| | * | | | | | | | | | | | Add log_experimental() and experimental() API and "yosys -x" | Claire Wolf | 2020-01-27 | 1 | -1/+1 |
| * | | | | | | | | | | | | synth_xilinx: cleanup help | Eddie Hung | 2020-01-28 | 1 | -6/+4 |
| * | | | | | | | | | | | | synth_xilinx: fix help when no active_design; fixes #1664 | Eddie Hung | 2020-01-28 | 1 | -2/+3 |
| * | | | | | | | | | | | | xilinx: Add simulation model for DSP48 (Virtex 4). | Marcin Kościelnicki | 2020-01-29 | 6 | -45/+534 |
| * | | | | | | | | | | | | Merge pull request #1660 from YosysHQ/eddie/abc9_unpermute_luts | Eddie Hung | 2020-01-28 | 4 | -148/+100 |
| |\ \ \ \ \ \ \ \ \ \ \ \ |
|
| | * | | | | | | | | | | | | Fix $lut input ordering -- SigSpec(std::initializer_list<>) is backwards | Eddie Hung | 2020-01-27 | 1 | -1/+1 |
| | * | | | | | | | | | | | | Import tests from #1628 | Eddie Hung | 2020-01-27 | 1 | -2/+2 |
| | * | | | | | | | | | | | | xilinx/ice40/ecp5: undo permuting LUT masks in lut_map | Eddie Hung | 2020-01-27 | 3 | -146/+98 |
| * | | | | | | | | | | | | | Fix unresolved conflict from #1573 | Eddie Hung | 2020-01-28 | 1 | -1/+1 |
| * | | | | | | | | | | | | | Merge pull request #1573 from YosysHQ/eddie/xilinx_tristate | N. Engelhardt | 2020-01-28 | 1 | -0/+3 |
| |\ \ \ \ \ \ \ \ \ \ \ \ \
| | |/ / / / / / / / / / / /
| |/| | | | | | | | | | | | |
|
| | * | | | | | | | | | | | | Duplicate tribuf call, credit to @mwkmwkmwk | Eddie Hung | 2019-12-13 | 1 | -1/+0 |
| | * | | | | | | | | | | | | synth_xilinx: error out if tristate without '-iopad' | Eddie Hung | 2019-12-12 | 1 | -0/+4 |
| * | | | | | | | | | | | | | Merge pull request #1619 from YosysHQ/eddie/abc9_refactor | Eddie Hung | 2020-01-27 | 1 | -8/+8 |
| |\ \ \ \ \ \ \ \ \ \ \ \ \
| | | |_|_|_|_|_|_|_|_|_|_|/
| | |/| | | | | | | | | | | |
|
| | * | | | | | | | | | | | | Fix $__ABC9_ASYNC1 to output 1'b1 not 1'b0 | Eddie Hung | 2020-01-22 | 1 | -1/+1 |
| | * | | | | | | | | | | | | Merge remote-tracking branch 'origin/master' into eddie/abc9_refactor | Eddie Hung | 2020-01-21 | 4 | -128/+98 |
| | |\ \ \ \ \ \ \ \ \ \ \ \
| | | |_|_|_|_|_|_|_|_|_|_|/
| | |/| | | | | | | | | | | |
|
| | * | | | | | | | | | | | | Merge remote-tracking branch 'origin/master' into eddie/abc9_refactor | Eddie Hung | 2020-01-15 | 1 | -1/+1 |
| | |\ \ \ \ \ \ \ \ \ \ \ \
| | | |_|_|_|_|_|_|_|_|_|_|/
| | |/| | | | | | | | | | | |
|
| | * | | | | | | | | | | | | Adding (* techmap_autopurge *) to FD* in abc9_map.v | Eddie Hung | 2020-01-14 | 1 | -8/+8 |
| * | | | | | | | | | | | | | Merge pull request #1656 from YosysHQ/eddie/ice40_abc9_warnings | Eddie Hung | 2020-01-27 | 4 | -6/+10 |
| |\ \ \ \ \ \ \ \ \ \ \ \ \
| | |_|_|_|_|/ / / / / / / /
| |/| | | | | | | | | | | | |
|
| | * | | | | | | | | | | | | ice40: reduce ABC9 internal fanout warnings with a param for CI->I3 | Eddie Hung | 2020-01-24 | 4 | -6/+10 |
| | | |_|/ / / / / / / / /
| | |/| | | | | | | | | | |
|
| * | | | | | | | | | | | | ice40: add SB_SPRAM256KA arrival time | Eddie Hung | 2020-01-24 | 1 | -0/+1 |
| * | | | | | | | | | | | | Fix $__ABC9_ASYNC1 to output 1'b1 not 1'b0 | Eddie Hung | 2020-01-23 | 1 | -1/+1 |
| |/ / / / / / / / / / / |
|
* | | | | | | | | | | | | Explicitly create separate $mux cells | Eddie Hung | 2020-01-21 | 1 | -2/+2 |
* | | | | | | | | | | | | Fix tests -- when Y_WIDTH is non-pow-2 | Eddie Hung | 2020-01-21 | 1 | -3/+4 |
* | | | | | | | | | | | | Move from +/shiftx2mux.v into +/techmap.v; cleanup | Eddie Hung | 2020-01-21 | 3 | -73/+69 |
* | | | | | | | | | | | | New techmap +/shiftx2mux.v which decomposes LSB first; better for ABC | Eddie Hung | 2020-01-21 | 2 | -0/+39 |
|/ / / / / / / / / / / |
|
* | | | | | | | | | | | Merge pull request #1643 from YosysHQ/eddie/cleanup_arith_map | Eddie Hung | 2020-01-18 | 2 | -125/+88 |
|\ \ \ \ \ \ \ \ \ \ \ |
|
| * | | | | | | | | | | | Deprecate `_CLB_CARRY from +/xilinx/arith_map.v since #1623 | Eddie Hung | 2020-01-17 | 2 | -119/+82 |
| * | | | | | | | | | | | +/xilinx/arith_map.v fix $lcu rule | Eddie Hung | 2020-01-17 | 1 | -6/+6 |
| | |/ / / / / / / / /
| |/| | | | | | | | | |
|