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Author
Age
Files
Lines
*
Restore $__XILINX_MUXF78 const optimisation
Eddie Hung
2019-06-28
1
-24
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+24
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Clean up trimming leading 1'bx in A during techmappnig
Eddie Hung
2019-06-28
1
-15
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+9
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Fix CARRY4 abc_box_id
Eddie Hung
2019-06-28
1
-1
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+1
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Merge remote-tracking branch 'origin/master' into xc7mux
Eddie Hung
2019-06-28
7
-26
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+13
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Update synth_ice40 -device doc to be relevant for -abc9 only
Eddie Hung
2019-06-28
1
-2
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+2
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Disable boxing of ECP5 dist RAM due to regression
Eddie Hung
2019-06-28
1
-1
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+1
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Add write address to abc_scc_break of ECP5 dist RAM
Eddie Hung
2019-06-28
1
-1
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+1
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Fix DO4 typo
Eddie Hung
2019-06-28
1
-1
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+1
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Reduce diff with upstream
Eddie Hung
2019-06-27
1
-4
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+2
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Extraneous newline
Eddie Hung
2019-06-27
1
-1
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+0
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Remove noise from ice40/cells_sim.v
Eddie Hung
2019-06-27
1
-5
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+0
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Refactor for one "abc_carry" attribute on module
Eddie Hung
2019-06-27
3
-9
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+7
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Remove redundant doc
Eddie Hung
2019-06-27
1
-3
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+0
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Merge remote-tracking branch 'origin/xaig' into xc7mux
Eddie Hung
2019-06-27
1
-7
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+10
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Add warning if synth_xilinx -abc9 with family != xc7
Eddie Hung
2019-06-27
1
-0
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+2
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Merge origin/master
Eddie Hung
2019-06-27
4
-51
/
+100
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MUXF78 -> $__MUXF78 to indicate internal
Eddie Hung
2019-06-26
1
-1
/
+1
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Merge remote-tracking branch 'origin/xaig' into xc7mux
Eddie Hung
2019-06-26
4
-8
/
+10
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Add WE to ECP5 dist RAM's abc_scc_break too
Eddie Hung
2019-06-26
1
-1
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+1
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Update comment on boxes
Eddie Hung
2019-06-26
2
-4
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+6
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Add "WE" to dist RAM's abc_scc_break
Eddie Hung
2019-06-26
1
-3
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+3
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synth_xilinx's muxcover call to be very conservative -- -nodecode
Eddie Hung
2019-06-26
1
-1
/
+1
*
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Accidentally removed "simplemap $mux"
Eddie Hung
2019-06-26
1
-0
/
+1
*
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Replace with <internal options>
Eddie Hung
2019-06-26
1
-2
/
+2
*
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Rework help_mode for synth_xilinx -widemux
Eddie Hung
2019-06-26
1
-22
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+23
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Return to upstream synth_xilinx with opt -full and wreduce
Eddie Hung
2019-06-26
1
-19
/
+3
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Merge remote-tracking branch 'origin/eddie/fix1132' into xc7mux
Eddie Hung
2019-06-26
3
-44
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+92
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Simulation model verilog fix
Miodrag Milanovic
2019-06-26
2
-14
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+1
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Add more ECP5 Diamond flip-flops.
whitequark
2019-06-26
2
-30
/
+91
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Instead of blocking wreduce on $mux, use -keepdc instead #1132
Eddie Hung
2019-06-26
1
-2
/
+2
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Do not call opt with -full before muxcover
Eddie Hung
2019-06-26
1
-1
/
+1
*
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Merge remote-tracking branch 'origin/xaig' into xc7mux
Eddie Hung
2019-06-26
1
-1
/
+1
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Remove unused var
Eddie Hung
2019-06-26
1
-1
/
+1
*
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Cleanup abc_box_id
Eddie Hung
2019-06-26
2
-10
/
+10
*
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Merge remote-tracking branch 'origin/xaig' into xc7mux
Eddie Hung
2019-06-26
4
-19
/
+67
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Add _nowide variants of LUT libraries in -nowidelut flows
Eddie Hung
2019-06-26
4
-13
/
+44
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*
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Merge branch 'xaig' of github.com:YosysHQ/yosys into xaig
Eddie Hung
2019-06-26
1
-2
/
+10
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Merge branch 'koriakin/xc7nocarrymux' into xaig
Eddie Hung
2019-06-26
2
-9
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+26
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synth_ecp5 rename -nomux to -nowidelut, but preserve former
Eddie Hung
2019-06-26
1
-6
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+6
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*
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Merge branch 'xc7nocarrymux' of https://github.com/koriakin/yosys into koriak...
Eddie Hung
2019-06-26
1
-4
/
+24
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synth_xilinx: Add -nocarry and -nomux options.
Marcin Kościelnicki
2019-04-30
1
-7
/
+26
*
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Rename -minmuxf to -widemux
Eddie Hung
2019-06-26
1
-23
/
+23
*
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Merge remote-tracking branch 'origin/xaig' into xc7mux
Eddie Hung
2019-06-26
1
-2
/
+10
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abc9: Add wire delays to synth_ice40
David Shah
2019-06-26
1
-2
/
+10
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Realistic delays for RAM32X1D too
Eddie Hung
2019-06-25
1
-2
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+2
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Add RAM32X1D box info
Eddie Hung
2019-06-25
2
-4
/
+12
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Merge remote-tracking branch 'origin/master' into xaig
Eddie Hung
2019-06-25
5
-8
/
+72
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This optimisation doesn't seem to work...
Eddie Hung
2019-06-25
1
-24
/
+24
*
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Realistic delays for RAM32X1D too
Eddie Hung
2019-06-24
1
-2
/
+2
*
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Merge remote-tracking branch 'origin/xaig' into xc7mux
Eddie Hung
2019-06-24
1
-4
/
+4
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