aboutsummaryrefslogtreecommitdiffstats
path: root/frontends/verilog/verilog_frontend.cc
Commit message (Collapse)AuthorAgeFilesLines
* verilog: Squash a memory leak.Marcelina Kościelnicka2021-06-141-8/+4
| | | | That was added in ecc22f7fedfa639482dbc55a05709da85116a60f
* Fixing old e-mail addresses and deadnamesClaire Xenia Wolf2021-06-081-1/+1
| | | | | | | | s/((Claire|Xen|Xenia|Clifford)\s+)+(Wolf|Xen)\s+<(claire|clifford)@(symbioticeda.com|clifford.at|yosyshq.com)>/Claire Xenia Wolf <claire@yosyshq.com>/gi; s/((Nina|Nak|N\.)\s+)+Engelhardt\s+<nak@(symbioticeda.com|yosyshq.com)>/N. Engelhardt <nak@yosyshq.com>/gi; s/((David)\s+)+Shah\s+<(dave|david)@(symbioticeda.com|yosyshq.com|ds0.me)>/David Shah <dave@ds0.me>/gi; s/((Miodrag)\s+)+Milanovic\s+<(miodrag|micko)@(symbioticeda.com|yosyshq.com)>/Miodrag Milanovic <micko@yosyshq.com>/gi; s,https?://www.clifford.at/yosys/,http://yosyshq.net/yosys/,g;
* verilog: rebuild user_type_stack from globals before parsing fileXiretza2021-03-181-5/+21
| | | | | | | | | | | | This was actually a ticking UB bomb: after running the parser, the type maps contain pointers to children of the current AST, which is recursively deleted after the pass has executed. This leaves the pointers in user_type_stack dangling, which just happened to never be a problem due to another bug that causes typedefs from higher-level type maps to never be considered. Rebuilding the type stack from the design's globals ensures the AstNode pointers are valid.
* sv: carry over global typedefs from previous filesZachary Snow2021-03-171-2/+5
| | | | | | | This breaks the ability to use a global typename as a standard identifier in a subsequent input file. This is otherwise backwards compatible, including for sources which previously included conflicting typedefs in each input file.
* Fix indents.Tom Verbeure2021-01-041-2/+2
|
* Add -nosynthesis flag for read_verilog command.Tom Verbeure2021-01-041-3/+12
|
* Fix SYNTHESIS always being defined in Verilog frontendgeorgerennie2020-12-011-0/+3
|
* Use C++11 final/override keywords.whitequark2020-06-181-6/+6
|
* frontend: cleanup to use more ID::*, more dict<> instead of map<>Eddie Hung2020-05-041-1/+1
|
* Merge pull request #1811 from PeterCrozier/typedef_scopeN. Engelhardt2020-03-301-1/+2
|\ | | | | Support module/package/interface/block scope for typedef names.
| * Support module/package/interface/block scope for typedef names.Peter Crozier2020-03-231-1/+2
| |
* | Add support for SystemVerilog-style `define to Verilog frontendRupert Swarbrick2020-03-271-13/+13
|/ | | | | | | | | | | | | | | | | | | | | | | | | | | This patch should support things like `define foo(a, b = 3, c) a+b+c `foo(1, ,2) which will evaluate to 1+3+2. It also spots mistakes like `foo(1) (the 3rd argument doesn't have a default value, so a call site is required to set it). Most of the patch is a simple parser for the format in preproc.cc, but I've also taken the opportunity to wrap up the "name -> definition" map in a type, rather than use multiple std::map's. Since this type needs to be visible to code that touches defines, I've pulled it (and the frontend_verilog_preproc declaration) out into a new file at frontends/verilog/preproc.h and included that where necessary. Finally, the patch adds a few tests in tests/various to check that we are parsing everything correctly.
* Build pkg_user_types before parsing in case of changes in the design.Peter Crozier2020-03-221-6/+3
|
* Clear pkg_user_types if no packages following a 'design -reset-vlog'.Peter2020-03-221-0/+4
|
* Parser changes to support typedef.Peter2020-03-221-0/+19
|
* Closes #1717. Add more precise Verilog source location information to AST ↵Alberto Gonzalez2020-02-231-1/+1
| | | | and RTLIL nodes.
* Add "verilog_defines -list" and "verilog_defines -reset"Clifford Wolf2019-10-211-0/+16
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Add "read_verilog -pwires" feature, closes #1106Clifford Wolf2019-06-191-1/+9
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Merge remote-tracking branch 'origin/master' into clifford/specifyEddie Hung2019-05-031-2/+2
|\
| * Include filename in "Executing Verilog-2005 frontend" message, fixes #959Clifford Wolf2019-04-301-2/+2
| | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* | Add specify parserClifford Wolf2019-04-231-5/+13
|/ | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* New behavior for front-end handling of whiteboxesClifford Wolf2019-04-201-9/+20
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Add "whitebox" attribute, add "read_verilog -wb"Clifford Wolf2019-04-181-2/+12
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Improve read_verilog debug output capabilitiesClifford Wolf2019-03-211-5/+24
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Add "read_verilog -noassert -noassume -assert-assumes"Clifford Wolf2018-09-241-1/+22
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Added -no_dump_ptr flag for AST dump options in 'read_verilog'Udi Finkelstein2018-08-231-1/+9
| | | | | | This option disables the memory pointer display. This is useful when diff'ing different dumps because otherwise the node pointers makes every diff line different when the AST content is the same.
* Consistent use of 'override' for virtual methods in derived classes.Henner Zeller2018-07-201-6/+6
| | | | | | | | | o Not all derived methods were marked 'override', but it is a great feature of C++11 that we should make use of. o While at it: touched header files got a -*- c++ -*- for emacs to provide support for that language. o use YS_OVERRIDE for all override keywords (though we should probably use the plain keyword going forward now that C++11 is established)
* Use log_file_warning(), log_file_error() functions.Henner Zeller2018-07-201-5/+3
| | | | Wherever we can report a source-level location.
* Replace -ignore_redef with -[no]overwriteClifford Wolf2018-05-031-6/+17
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Bugfix in verilog_defaults argument parserClifford Wolf2017-12-241-1/+1
|
* Add a paragraph about pre-defined macros to read_verilog help messageClifford Wolf2017-07-211-0/+4
|
* Added "verilog_defines" commandClifford Wolf2016-12-151-0/+60
|
* Bugfix in "read_verilog -D NAME=VAL" handlingClifford Wolf2016-11-281-3/+3
|
* Remember global declarations and defines accross read_verilog callsClifford Wolf2016-11-151-1/+1
|
* Added read_verilog -norestrict -assume-assertsClifford Wolf2016-08-261-1/+17
|
* Added "read_verilog -dump_rtlil"Clifford Wolf2016-07-271-1/+9
|
* No tristate warning message for "read_verilog -lib"Clifford Wolf2016-07-231-3/+3
|
* Small improvements in Verilog front-end docsClifford Wolf2016-05-201-0/+3
|
* Added "yosys -D" featureClifford Wolf2016-04-211-1/+1
|
* Fixed typos in verilog_defaults help messageClifford Wolf2016-03-101-3/+3
|
* SystemVerilog also has assume(), added implicit -D FORMALClifford Wolf2015-10-131-2/+2
|
* Added read_verilog -nodpiClifford Wolf2015-09-231-0/+19
|
* Re-created command-reference-manual.tex, copied some doc fixes to online helpClifford Wolf2015-08-141-6/+6
|
* Spell check (by Larry Doolittle)Clifford Wolf2015-08-141-1/+1
|
* Add -noautowire option to verilog frontendMarcus Comstedt2015-08-011-1/+8
|
* Fixed trailing whitespacesClifford Wolf2015-07-021-2/+2
|
* Verilog front-end: define `BLACKBOX in -lib modeClifford Wolf2015-04-191-1/+2
|
* Added non-std verilog assume() statementClifford Wolf2015-02-261-1/+11
|
* Added "read_verilog -nomeminit" and "nomeminit" attributeClifford Wolf2015-02-141-1/+15
|
* Print "SystemVerilog" in "read_verilog -sv" log messagesClifford Wolf2014-10-161-1/+1
|
generated by cgit v1.2.3 (git 2.25.1) at 2024-07-05 02:17:04 +0000