diff options
| author | Peter Crozier <peter@crozier.com> | 2020-03-15 19:01:46 +0000 |
|---|---|---|
| committer | Grazfather <grazfather@gmail.com> | 2020-03-22 18:20:46 -0700 |
| commit | c06eda25041cd567ac53da52d486dfd0daa8eaff (patch) | |
| tree | f546984fe5c9d1c4a6820e3dc994e87937427bea /frontends/verilog/verilog_frontend.cc | |
| parent | 0aaa36ca6d4a95771ef26a515b64031c4d43be11 (diff) | |
| download | yosys-c06eda25041cd567ac53da52d486dfd0daa8eaff.tar.gz yosys-c06eda25041cd567ac53da52d486dfd0daa8eaff.tar.bz2 yosys-c06eda25041cd567ac53da52d486dfd0daa8eaff.zip | |
Build pkg_user_types before parsing in case of changes in the design.
Diffstat (limited to 'frontends/verilog/verilog_frontend.cc')
| -rw-r--r-- | frontends/verilog/verilog_frontend.cc | 9 |
1 files changed, 3 insertions, 6 deletions
diff --git a/frontends/verilog/verilog_frontend.cc b/frontends/verilog/verilog_frontend.cc index 61db0a176..f2c1c227f 100644 --- a/frontends/verilog/verilog_frontend.cc +++ b/frontends/verilog/verilog_frontend.cc @@ -465,10 +465,9 @@ struct VerilogFrontend : public Frontend { log("-- Verilog code after preprocessor --\n%s-- END OF DUMP --\n", code_after_preproc.c_str()); lexin = new std::istringstream(code_after_preproc); } - if (design->verilog_packages.empty()) { - // might be because of a `design -reset-vlog` command - pkg_user_types.clear(); - } + + // make package typedefs available to parser + add_package_types(pkg_user_types, design->verilog_packages); frontend_verilog_yyset_lineno(1); frontend_verilog_yyrestart(NULL); @@ -488,8 +487,6 @@ struct VerilogFrontend : public Frontend { AST::process(design, current_ast, flag_dump_ast1, flag_dump_ast2, flag_no_dump_ptr, flag_dump_vlog1, flag_dump_vlog2, flag_dump_rtlil, flag_nolatches, flag_nomeminit, flag_nomem2reg, flag_mem2reg, flag_noblackbox, lib_mode, flag_nowb, flag_noopt, flag_icells, flag_pwires, flag_nooverwrite, flag_overwrite, flag_defer, default_nettype_wire); - // make latest package info available to next parser - add_package_types(pkg_user_types, design->verilog_packages); if (!flag_nopp) delete lexin; |