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Author
Age
Files
Lines
*
Fix writing non-whole modules, including inouts and keeps
Eddie Hung
2019-12-06
1
-90
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+81
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write_xaiger to support part-selected modules again
Eddie Hung
2019-12-05
1
-11
/
+37
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Cleanup
Eddie Hung
2019-12-03
1
-11
/
+12
*
write_xaiger to consume abc9_init attribute for abc9_flops
Eddie Hung
2019-12-03
1
-34
/
+28
*
Add comment, use sigmap
Eddie Hung
2019-11-27
1
-2
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+2
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Revert "Fold loop"
Eddie Hung
2019-11-27
1
-3
/
+6
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xaiger: do not promote output wires
Eddie Hung
2019-11-26
1
-5
/
+0
*
Fold loop
Eddie Hung
2019-11-25
1
-6
/
+3
*
Do not sigmap keep bits inside write_xaiger
Eddie Hung
2019-11-25
1
-1
/
+1
*
write_xaiger back to working with whole modules only
Eddie Hung
2019-11-22
1
-5
/
+2
*
Revert "write_xaiger to not use module POs but only write outputs if driven"
Eddie Hung
2019-11-22
1
-23
/
+11
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write_xaiger to not use module POs but only write outputs if driven
Eddie Hung
2019-11-21
1
-11
/
+23
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abc9 to support async flops $_DFF_[NP][NP][01]_
Eddie Hung
2019-11-19
1
-1
/
+2
*
Merge remote-tracking branch 'origin/master' into xaig_dff
Eddie Hung
2019-11-19
4
-21
/
+103
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*
write_verilog: add -extmem option, to write split memory init files.
whitequark
2019-11-18
1
-10
/
+80
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*
Use cell name for btor bad state props when it is a public name
Clifford Wolf
2019-11-14
1
-9
/
+5
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*
Add an info string symbol for bad states in btor backend
Makai Mann
2019-11-11
1
-1
/
+10
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*
Fix write_aiger bug added in 524af21
Clifford Wolf
2019-11-04
1
-0
/
+3
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*
Merge pull request #1393 from whitequark/write_verilog-avoid-init
Clifford Wolf
2019-10-27
1
-4
/
+5
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*
write_verilog: do not print (*init*) attributes on regs.
whitequark
2019-09-22
1
-4
/
+5
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*
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Bugfix in smtio vcd handling of $-identifiers
Clifford Wolf
2019-10-23
1
-6
/
+9
*
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Rename $currQ to $abc9_currQ
Eddie Hung
2019-10-07
1
-8
/
+8
*
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Get rid of latch_* in write_xaiger
Eddie Hung
2019-10-07
1
-7
/
+1
*
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Remove "write_xaiger -zinit"
Eddie Hung
2019-10-07
1
-16
/
+6
*
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Add comment on default flop init
Eddie Hung
2019-10-07
1
-0
/
+1
*
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Get rid of output_port lookup
Eddie Hung
2019-10-07
1
-14
/
+8
*
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Do not require changes to cells_sim.v; try and work out comb model
Eddie Hung
2019-10-05
1
-48
/
+70
*
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Error if $currQ not found
Eddie Hung
2019-10-05
1
-0
/
+4
*
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Fix merge issues
Eddie Hung
2019-10-04
1
-1
/
+1
*
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Merge remote-tracking branch 'origin/eddie/abc_to_abc9' into xaig_dff
Eddie Hung
2019-10-04
1
-11
/
+11
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*
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Rename abc_* names/attributes to more precisely be abc9_*
Eddie Hung
2019-10-04
1
-9
/
+9
*
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Merge remote-tracking branch 'origin/master' into xaig_dff
Eddie Hung
2019-10-03
2
-20
/
+23
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*
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Change smtbmc "Warmup failed" status to "PREUNSAT"
Clifford Wolf
2019-10-03
1
-14
/
+14
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*
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Fix btor back-end to use "state" instead of "input" for undef init bits
Clifford Wolf
2019-10-02
1
-6
/
+9
*
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No need to punch ports at all
Eddie Hung
2019-09-30
1
-0
/
+24
*
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Remove need for $currQ port connection
Eddie Hung
2019-09-30
1
-3
/
+3
*
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Cleanup
Eddie Hung
2019-09-30
1
-100
/
+3
*
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Use a cell_cache to instantiate once rather than opt_merge call
Eddie Hung
2019-09-30
1
-15
/
+15
*
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scc call on active module module only, plus cleanup
Eddie Hung
2019-09-30
1
-8
/
+12
*
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Use derived module
Eddie Hung
2019-09-30
1
-22
/
+5
*
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Merge remote-tracking branch 'origin/master' into xaig_dff
Eddie Hung
2019-09-29
1
-8
/
+8
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*
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Merge pull request #1359 from YosysHQ/xc7dsp
Eddie Hung
2019-09-29
1
-8
/
+8
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*
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"abc_padding" attr for blackbox outputs that were padded, remove them later
Eddie Hung
2019-09-23
1
-1
/
+6
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*
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Force $inout.out ports to begin with '$' to indicate internal
Eddie Hung
2019-09-23
1
-1
/
+1
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*
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When two boxes connect to each other, need not be a (* keep *)
Eddie Hung
2019-09-19
1
-6
/
+1
*
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Merge remote-tracking branch 'origin/master' into xaig_dff
Eddie Hung
2019-09-29
4
-5
/
+8
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\
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*
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Merge pull request #1413 from YosysHQ/mmicko/backend_binary_out
Miodrag Milanović
2019-09-29
3
-4
/
+4
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*
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Add aiger and protobuf backends binary support
Miodrag Milanovic
2019-09-28
2
-3
/
+3
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*
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Support binary files for backends, fixes #1407
Miodrag Milanovic
2019-09-28
1
-1
/
+1
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/
/
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*
/
/
Corrects btor2 backend
Aman Goel
2019-09-27
1
-1
/
+4
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/
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