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| author | Eddie Hung <eddie@fpgeh.com> | 2019-11-27 13:20:12 -0800 |
|---|---|---|
| committer | Eddie Hung <eddie@fpgeh.com> | 2019-11-27 13:20:12 -0800 |
| commit | 449b1d2c6f3f3dffcb0bd50f4d6398ceb928b114 (patch) | |
| tree | de567c119116c4005f63d74997af81b45c35ae36 /backends | |
| parent | 403214f44d8f447ce4e367e2d7e135bfaabcb88d (diff) | |
| download | yosys-449b1d2c6f3f3dffcb0bd50f4d6398ceb928b114.tar.gz yosys-449b1d2c6f3f3dffcb0bd50f4d6398ceb928b114.tar.bz2 yosys-449b1d2c6f3f3dffcb0bd50f4d6398ceb928b114.zip | |
Add comment, use sigmap
Diffstat (limited to 'backends')
| -rw-r--r-- | backends/aiger/xaiger.cc | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/backends/aiger/xaiger.cc b/backends/aiger/xaiger.cc index 8b809b2e2..e05b6cc60 100644 --- a/backends/aiger/xaiger.cc +++ b/backends/aiger/xaiger.cc @@ -198,11 +198,11 @@ struct XAigerWriter } } + // Cannot fold into above due to use of sigmap for (auto bit : input_bits) undriven_bits.erase(sigmap(bit)); for (auto bit : output_bits) - if (!bit.wire->port_input) - unused_bits.erase(bit); + unused_bits.erase(sigmap(bit)); // TODO: Speed up toposort -- ultimately we care about // box ordering, but not individual AIG cells |