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* xaiger: remove some unnecessary operations ...Eddie Hung2020-03-061-9/+2
* abc9: (* keep *) wires to be PO only, not PI as well; fix scc handlingEddie Hung2020-03-061-3/+4
* Make TimingInfo::TimingInfo(SigBit) constructor explicitEddie Hung2020-02-271-1/+1
* write_xaiger: add comment about arrival times of flop outputsEddie Hung2020-02-271-0/+1
* Get rid of (* abc9_{arrival,required} *) entirelyEddie Hung2020-02-271-29/+15
* abc9_ops: ignore (* abc9_flop *) if not '-dff'Eddie Hung2020-02-271-38/+44
* xilinx: improve specify functionalityEddie Hung2020-02-271-0/+3
* Merge pull request #1703 from YosysHQ/eddie/specify_improveEddie Hung2020-02-211-2/+10
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| * specify: system timing checks to accept min:typ:max tripleEddie Hung2020-02-131-2/+10
* | Revert "abc9: fix abc9_arrival for flops"Eddie Hung2020-02-141-5/+2
* | write_xaiger: default value for abc9_initEddie Hung2020-02-131-1/+1
* | abc9: fix abc9_arrival for flopsEddie Hung2020-02-131-2/+5
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* json: Change compat mode to directly emit ints <= 32 bitsR. Ou2020-02-091-3/+3
* Merge pull request #1683 from whitequark/write_verilog-memattrswhitequark2020-02-071-0/+1
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| * write_verilog: dump $mem cell attributes.whitequark2020-02-061-0/+1
* | edif: more resilience to mismatched port connection sizes.Marcin Kościelnicki2020-02-061-16/+27
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* Merge pull request #1661 from YosysHQ/eddie/abc9_requiredEddie Hung2020-02-051-17/+42
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| * Merge branch 'eddie/abc9_refactor' into eddie/abc9_requiredEddie Hung2020-01-272-3/+5
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| * \ Merge remote-tracking branch 'origin/eddie/abc9_refactor' into eddie/abc9_req...Eddie Hung2020-01-151-1/+2
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| * | | abc9_ops: cope with (* abc9_flop *) in place of (* abc9_box_id *)Eddie Hung2020-01-141-1/+1
| * | | Merge remote-tracking branch 'origin/eddie/abc9_refactor' into eddie/abc9_req...Eddie Hung2020-01-141-2/+6
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| * | | | abc9_ops: generate flop box ids, add abc9_required to FD* cellsEddie Hung2020-01-141-1/+5
| * | | | Merge remote-tracking branch 'origin/eddie/abc9_refactor' into eddie/abc9_req...Eddie Hung2020-01-141-1/+1
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| * | | | | write_xaiger: skip if no arrival timesEddie Hung2020-01-141-0/+3
| * | | | | Merge remote-tracking branch 'origin/eddie/abc9_refactor' into eddie/abc9_req...Eddie Hung2020-01-142-94/+145
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| * \ \ \ \ \ Merge remote-tracking branch 'origin/eddie/abc9_refactor' into eddie/abc9_req...Eddie Hung2020-01-121-19/+28
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| * | | | | | | log_debug() for abc9_{arrival,required} timesEddie Hung2020-01-101-0/+8
| * | | | | | | write_xaiger: cleanupEddie Hung2020-01-091-17/+15
| * | | | | | | write_xaiger: cope with abc9_arrival as string of intsEddie Hung2020-01-091-8/+21
* | | | | | | | json: remove the 32-bit parameter special caseMarcin Kościelnicki2020-02-011-10/+28
* | | | | | | | Preserve wires with keep attribute in EDIF back-endClaire Wolf2020-01-291-9/+34
* | | | | | | | Merge pull request #1619 from YosysHQ/eddie/abc9_refactorEddie Hung2020-01-271-363/+192
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| * | | | | | | Merge remote-tracking branch 'origin/master' into eddie/abc9_refactorEddie Hung2020-01-211-0/+2
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| * | | | | | | | write_xaiger: fix for (* keep *) on flop outputEddie Hung2020-01-211-3/+3
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| * | | | | | | write_xaiger: skip abc9_flop only if abc_box_seq presentEddie Hung2020-01-151-1/+2
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| * | | | | | write_xaiger: do not export flop inputs as POsEddie Hung2020-01-141-2/+6
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| * | | | | abc9_ops: -reintegrate to not trim box padding anymoreEddie Hung2020-01-141-1/+1
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| * | | | abc9_ops/write_xaiger: update docEddie Hung2020-01-141-1/+2
| * | | | abc9_ops: -prep_holes -> -prep_xaiger, move padding to write_xaigerEddie Hung2020-01-141-3/+6
| * | | | Merge remote-tracking branch 'origin/master' into eddie/abc9_refactorEddie Hung2020-01-141-25/+37
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| * | | | | write_xaiger: fix case of PI and CI and (* keep *)Eddie Hung2020-01-131-0/+5
| * | | | | abc9: break SCC by setting (* keep *) on output wiresEddie Hung2020-01-131-8/+15
| * | | | | abc9: respect (* keep *) on cellsEddie Hung2020-01-131-61/+69
| * | | | | write_xaiger: add support and test for (* keep *) on wiresEddie Hung2020-01-131-7/+17
| * | | | | write_xaiger: cache arrival timesEddie Hung2020-01-131-11/+17
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| * | | | cleanupEddie Hung2020-01-111-1/+1
| * | | | Merge remote-tracking branch 'origin/master' into eddie/abc9_refactorEddie Hung2020-01-111-18/+27
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| * | | | Stray log_moduleEddie Hung2020-01-061-2/+0
| * | | | Revert "write_xaiger to pad, not abc9_ops -prep_holes"Eddie Hung2020-01-061-16/+10
| * | | | Merge remote-tracking branch 'origin/xaig_dff' into eddie/abc9_refactorEddie Hung2020-01-062-56/+41
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