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| author | Eddie Hung <eddie@fpgeh.com> | 2020-02-18 11:02:28 -0800 |
|---|---|---|
| committer | Eddie Hung <eddie@fpgeh.com> | 2020-02-27 10:17:29 -0800 |
| commit | 6bb3d9f9c09993960a5a91fa51f163a7e67e2503 (patch) | |
| tree | 4e06827d7dfa711a2a5d1cd4702d5a0dfb4dddd5 /backends | |
| parent | 9dcf204dece518a48192a90ea962a9d630283e11 (diff) | |
| download | yosys-6bb3d9f9c09993960a5a91fa51f163a7e67e2503.tar.gz yosys-6bb3d9f9c09993960a5a91fa51f163a7e67e2503.tar.bz2 yosys-6bb3d9f9c09993960a5a91fa51f163a7e67e2503.zip | |
Make TimingInfo::TimingInfo(SigBit) constructor explicit
Diffstat (limited to 'backends')
| -rw-r--r-- | backends/aiger/xaiger.cc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/backends/aiger/xaiger.cc b/backends/aiger/xaiger.cc index dc0f997fe..402f41597 100644 --- a/backends/aiger/xaiger.cc +++ b/backends/aiger/xaiger.cc @@ -263,7 +263,7 @@ struct XAigerWriter continue; for (int i = 0; i < GetSize(conn.second); i++) { - auto d = t.at(SigBit(port_wire,i), 0); + auto d = t.at(TimingInfo::NameBit(conn.first,i), 0); if (d == 0) continue; |