| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | Merge pull request #1623 from YosysHQ/mmicko/edif_attr | Miodrag Milanović | 2020-01-14 | 1 | -25/+37 |
| |\ | | | | | Export wire properties in EDIF | ||||
| | * | remove whitespace | Miodrag Milanovic | 2020-01-10 | 1 | -1/+1 |
| | | | |||||
| | * | Export wire properties as well in EDIF | Miodrag Milanovic | 2020-01-10 | 1 | -26/+38 |
| | | | |||||
| * | | write_xaiger: create holes_sigmap before modifications | Eddie Hung | 2020-01-11 | 1 | -1/+2 |
| | | | |||||
| * | | write_xaiger: sort holes by offset as well as port_id | Eddie Hung | 2020-01-11 | 1 | -1/+2 |
| | | | |||||
| * | | write_xaiger: cleanup holes generation | Eddie Hung | 2020-01-08 | 1 | -80/+89 |
| | | | |||||
| * | | write_xaiger: holes PIs only if whitebox | Eddie Hung | 2020-01-08 | 1 | -13/+18 |
| |/ | |||||
| * | write_xaiger: make more robust, update doc | Eddie Hung | 2020-01-06 | 1 | -29/+14 |
| | | |||||
| * | write_aiger: make more robust | Eddie Hung | 2020-01-06 | 1 | -0/+8 |
| | | |||||
| * | Restore write_xaiger's holes_mode since port_id order causes QoR | Eddie Hung | 2020-01-03 | 1 | -27/+19 |
| | | | | | regressions inside abc9 | ||||
| * | Cleanup | Eddie Hung | 2020-01-02 | 1 | -2/+1 |
| | | |||||
| * | write_xaiger: get rid of external_bits dict | Eddie Hung | 2020-01-02 | 1 | -1/+1 |
| | | |||||
| * | abc9 -keepff -> -dff; refactor dff operations | Eddie Hung | 2020-01-02 | 1 | -89/+47 |
| | | |||||
| * | Get rid of (* abc9_keep *) in write_xaiger too | Eddie Hung | 2020-01-01 | 1 | -15/+18 |
| | | |||||
| * | attributes.count() -> get_bool_attribute() | Eddie Hung | 2020-01-01 | 1 | -1/+1 |
| | | |||||
| * | parse_xaiger to not take box_lookup | Eddie Hung | 2019-12-31 | 1 | -2/+13 |
| | | |||||
| * | Do not re-order carry chain ports, just precompute iteration order | Eddie Hung | 2019-12-31 | 1 | -22/+32 |
| | | |||||
| * | write_xaiger: be more precise with ff_bits, remove ff_aig_map | Eddie Hung | 2019-12-31 | 1 | -21/+19 |
| | | |||||
| * | Retry getting rid of write_xaiger's holes_mode | Eddie Hung | 2019-12-31 | 1 | -81/+41 |
| | | |||||
| * | Revert "Get rid of holes_mode" | Eddie Hung | 2019-12-30 | 1 | -35/+70 |
| | | | | | This reverts commit 7997e2a90fd37886241b7eb657408177ef7f6fa7. | ||||
| * | Get rid of holes_mode | Eddie Hung | 2019-12-30 | 1 | -70/+35 |
| | | |||||
| * | write_xaiger to use scratchpad for stats; cleanup abc9 | Eddie Hung | 2019-12-30 | 1 | -17/+5 |
| | | |||||
| * | Remove unused | Eddie Hung | 2019-12-30 | 1 | -5/+0 |
| | | |||||
| * | Call "proc" if processes inside whiteboxes | Eddie Hung | 2019-12-30 | 1 | -1/+1 |
| | | |||||
| * | Merge remote-tracking branch 'origin/master' into xaig_dff | Eddie Hung | 2019-12-30 | 1 | -21/+27 |
| |\ | |||||
| | * | write_xaiger: inherit port ordering from original module | Eddie Hung | 2019-12-27 | 1 | -5/+16 |
| | | | |||||
| | * | Revert "Merge pull request #1598 from YosysHQ/revert-1588-eddie/xaiger_cleanup" | Eddie Hung | 2019-12-27 | 1 | -19/+27 |
| | | | | | | | | | | | This reverts commit 92654f73ea92ee9e390c8ab50d8cb51c47a7ffa9, reversing changes made to 3e14ff16676884a1f65cf0eeb0ca9cb1958b8804. | ||||
| | * | Merge branch 'master' of github.com:YosysHQ/yosys | Eddie Hung | 2019-12-27 | 1 | -27/+19 |
| | |\ | |||||
| | | * | Revert "write_xaiger: only instantiate each whitebox cell type once" | David Shah | 2019-12-27 | 1 | -27/+19 |
| | | | | |||||
| | * | | write_xaiger: simplify c{i,o}_bits | Eddie Hung | 2019-12-27 | 1 | -12/+6 |
| | |/ | |||||
| | * | write_xaiger: only instantiate each whitebox cell type once | Eddie Hung | 2019-12-20 | 1 | -19/+27 |
| | | | |||||
| | * | Revert "Optimise write_xaiger" | Eddie Hung | 2019-12-20 | 1 | -24/+21 |
| | | | |||||
| | * | Stray newline | Eddie Hung | 2019-12-06 | 1 | -1/+0 |
| | | | |||||
| | * | write_xaiger to inst each cell type once, do not call techmap/aigmap | Eddie Hung | 2019-12-06 | 1 | -21/+25 |
| | | | |||||
| | * | Revert "Fold loop" | Eddie Hung | 2019-11-27 | 1 | -3/+6 |
| | | | | | | | | | This reverts commit a30d5e1cc35791a98b2269c5e587c566fe8b0a35. | ||||
| | * | latch -> box | Eddie Hung | 2019-11-26 | 1 | -1/+1 |
| | | | |||||
| | * | Fold loop | Eddie Hung | 2019-11-26 | 1 | -6/+3 |
| | | | |||||
| | * | Do not sigmap keep bits inside write_xaiger | Eddie Hung | 2019-11-26 | 1 | -1/+1 |
| | | | |||||
| | * | xaiger: do not promote output wires | Eddie Hung | 2019-11-26 | 1 | -5/+0 |
| | | | |||||
| * | | Add "synth_xilinx -dff" option, cleanup abc9 | Eddie Hung | 2019-12-30 | 1 | -2/+3 |
| | | | |||||
| * | | Really fix it! | Eddie Hung | 2019-12-27 | 1 | -10/+7 |
| | | | |||||
| * | | write_xaiger: fix arrival times for non boxes | Eddie Hung | 2019-12-27 | 1 | -18/+25 |
| | | | |||||
| * | | write_xaiger to opt instead of just clean whiteboxes | Eddie Hung | 2019-12-23 | 1 | -1/+1 |
| | | | |||||
| * | | Cleanup xaiger, remove unnecessary complexity with inout | Eddie Hung | 2019-12-17 | 1 | -61/+20 |
| | | | |||||
| * | | Do not sigmap | Eddie Hung | 2019-12-17 | 1 | -1/+1 |
| | | | |||||
| * | | Revert "Use sigmap signal" | Eddie Hung | 2019-12-17 | 1 | -1/+1 |
| | | | | | | | | | This reverts commit 42f990f3a6b7928841fa0e290fa2688925485907. | ||||
| * | | Use sigmap signal | Eddie Hung | 2019-12-16 | 1 | -1/+1 |
| | | | |||||
| * | | Skip $inout transformation if not a PI | Eddie Hung | 2019-12-16 | 1 | -3/+5 |
| | | | |||||
| * | | Revert "write_xaiger: use sigmap bits more consistently" | Eddie Hung | 2019-12-16 | 1 | -4/+5 |
| | | | | | | | | | This reverts commit 6c340112fee1bb8989cbd41923aaa627d77d5110. | ||||
| * | | write_xaiger: use sigmap bits more consistently | Eddie Hung | 2019-12-16 | 1 | -5/+4 |
| | | | |||||
 |
index : iCE40/yosys | |
| [no description] |
| aboutsummaryrefslogtreecommitdiffstats |