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* sim: Improvements and fixes for yw cosimJannis Harder2023-01-111-12/+1
* aiger: Use new JSON code for writing aiger witness map filesJannis Harder2023-01-111-49/+49
* write_aiger: Fix non-$_FF_ FFsJannis Harder2022-08-181-1/+1
* aiger: Add yosys-witness supportJannis Harder2022-08-161-0/+169
* aiger: Support $anyinit cellsJannis Harder2022-08-161-0/+11
* Add -no-startoffset option to write_aigerMiodrag Milanovic2022-03-251-8/+17
* sta: very crude static timing analysis passLofty2021-11-251-15/+16
* Fixing old e-mail addresses and deadnamesClaire Xenia Wolf2021-06-082-2/+2
* abc9: fix SCC issues (#2694)Eddie Hung2021-03-291-5/+4
* Replace assert in xaiger with more useful error messageDan Ravensloft2021-03-101-1/+2
* use the new isPublic() in a few placesN. Engelhardt2020-09-142-2/+2
* Use C++11 final/override keywords.whitequark2020-06-182-4/+4
* Merge pull request #2077 from YosysHQ/eddie/abc9_dff_improveEddie Hung2020-06-041-28/+22
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| * xaiger: cleanupEddie Hung2020-05-251-28/+22
* | xaiger: promote abc9_keep wiresEddie Hung2020-05-251-1/+1
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* xaiger: do not derive cellsEddie Hung2020-05-241-7/+1
* abc9: use (* abc9_keep *) instead of (* abc9_scc *); apply to $_DFF_?_Eddie Hung2020-05-141-5/+5
* abc9_ops/xaiger: further reducing Module::derive() calls by ...Eddie Hung2020-05-141-40/+32
* Cleanup; reduce Module::derive() callsEddie Hung2020-05-141-18/+20
* xaiger: no longer use nonstandard even/odd to designate +ve/-ve polarityEddie Hung2020-05-141-16/+5
* abc9: not enough to techmap_fail on (* init=1 *), hide them using $__Eddie Hung2020-05-141-0/+1
* Revert "Merge pull request #1917 from YosysHQ/eddie/abc9_delay_check"Eddie Hung2020-05-141-4/+0
* xaiger: always sort input/output bits by port idEddie Hung2020-05-141-12/+10
* abc9: generate $abc9_holes design instead of <name>$holesEddie Hung2020-05-141-3/+9
* aiger/xaiger: use odd for negedge clk, even for posedgeEddie Hung2020-05-141-6/+10
* xaiger: update help textEddie Hung2020-05-141-4/+4
* xaiger: do not treat (* init=1'bx *) as 1'b0Eddie Hung2020-05-141-1/+1
* xaiger: when -dff use (* init *) for initial stateEddie Hung2020-05-141-3/+15
* abc9_ops: add 'dff' label for auto handling of (* abc9_flop *) boxesEddie Hung2020-05-141-8/+2
* xaiger: output $_DFF_[NP]_ with mergeability if -dff optionEddie Hung2020-05-141-42/+44
* aiger: fixes for ports that have start_offset != 0Eddie Hung2020-05-022-9/+8
* xaiger: add check for $__ABC9_DELAY modelEddie Hung2020-04-131-0/+4
* kernel: big fat patch to use more ID::*, otherwise ID(*)Eddie Hung2020-04-022-36/+36
* kernel: use more ID::*Eddie Hung2020-04-022-17/+17
* xaiger: remove some unnecessary operations ...Eddie Hung2020-03-061-9/+2
* abc9: (* keep *) wires to be PO only, not PI as well; fix scc handlingEddie Hung2020-03-061-3/+4
* Make TimingInfo::TimingInfo(SigBit) constructor explicitEddie Hung2020-02-271-1/+1
* write_xaiger: add comment about arrival times of flop outputsEddie Hung2020-02-271-0/+1
* Get rid of (* abc9_{arrival,required} *) entirelyEddie Hung2020-02-271-29/+15
* abc9_ops: ignore (* abc9_flop *) if not '-dff'Eddie Hung2020-02-271-38/+44
* xilinx: improve specify functionalityEddie Hung2020-02-271-0/+3
* Revert "abc9: fix abc9_arrival for flops"Eddie Hung2020-02-141-5/+2
* write_xaiger: default value for abc9_initEddie Hung2020-02-131-1/+1
* abc9: fix abc9_arrival for flopsEddie Hung2020-02-131-2/+5
* Merge branch 'eddie/abc9_refactor' into eddie/abc9_requiredEddie Hung2020-01-271-3/+3
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| * write_xaiger: fix for (* keep *) on flop outputEddie Hung2020-01-211-3/+3
* | Merge remote-tracking branch 'origin/eddie/abc9_refactor' into eddie/abc9_req...Eddie Hung2020-01-151-1/+2
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| * write_xaiger: skip abc9_flop only if abc_box_seq presentEddie Hung2020-01-151-1/+2
* | abc9_ops: cope with (* abc9_flop *) in place of (* abc9_box_id *)Eddie Hung2020-01-141-1/+1
* | Merge remote-tracking branch 'origin/eddie/abc9_refactor' into eddie/abc9_req...Eddie Hung2020-01-141-2/+6
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