| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | Merge remote-tracking branch 'origin/master' into xc7dsp | Eddie Hung | 2019-09-11 | 11 | -63/+397 |
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| | * | Bump version | Clifford Wolf | 2019-09-10 | 1 | -1/+1 |
| | * | Fix misspelling | Eddie Hung | 2019-09-09 | 1 | -1/+1 |
| | * | synth_xilinx: Support init values on Spartan 6 flip-flops properly. | Marcin Kościelnicki | 2019-09-07 | 5 | -53/+219 |
| | * | techmap: Add support for extracting init values of ports | Marcin Kościelnicki | 2019-09-07 | 3 | -1/+169 |
| | * | Merge branch 'master' of github.com:YosysHQ/yosys | Eddie Hung | 2019-09-06 | 28 | -215/+719 |
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| | * | | Add missing -assert to equiv_opt | Eddie Hung | 2019-09-06 | 1 | -7/+7 |
| * | | | Only pack out registers if \init is zero or x; then remove \init from PREG | Eddie Hung | 2019-09-10 | 2 | -4/+18 |
| * | | | Fix RSTP | Eddie Hung | 2019-09-10 | 1 | -1/+1 |
| * | | | Add support for RSTP | Eddie Hung | 2019-09-10 | 2 | -26/+70 |
| * | | | enpol -> cepol | Eddie Hung | 2019-09-10 | 2 | -57/+59 |
| * | | | d?ffmux -> d?ffcemux | Eddie Hung | 2019-09-10 | 1 | -34/+33 |
| * | | | Refactor MREG and PREG to out_dffe subpattern | Eddie Hung | 2019-09-10 | 1 | -155/+122 |
| * | | | Update help text | Eddie Hung | 2019-09-10 | 1 | -3/+3 |
| * | | | Update xilinx_dsp help text | Eddie Hung | 2019-09-10 | 1 | -3/+21 |
| * | | | Update CHANGELOG | Eddie Hung | 2019-09-10 | 1 | -0/+5 |
| * | | | Move "(skip if -nodsp)" message to label | Eddie Hung | 2019-09-10 | 1 | -4/+4 |
| * | | | Be sensitive to signedness | Eddie Hung | 2019-09-10 | 1 | -20/+21 |
| * | | | Really get rid of 'opt_expr -fine' by being explicit | Eddie Hung | 2019-09-10 | 2 | -9/+33 |
| * | | | Remove wreduce call | Eddie Hung | 2019-09-10 | 1 | -1/+0 |
| * | | | Add comment for why opt_expr is necessary | Eddie Hung | 2019-09-10 | 1 | -0/+2 |
| * | | | Revert "Remove "opt_expr -fine" call" | Eddie Hung | 2019-09-10 | 1 | -0/+1 |
| * | | | Rename label to map_dsp | Eddie Hung | 2019-09-10 | 1 | -1/+1 |
| * | | | Remove "opt_expr -fine" call | Eddie Hung | 2019-09-10 | 1 | -1/+0 |
| * | | | Oops | Eddie Hung | 2019-09-09 | 1 | -0/+1 |
| * | | | Add SIMD test | Eddie Hung | 2019-09-09 | 1 | -0/+25 |
| * | | | Support subtraction as well | Eddie Hung | 2019-09-09 | 1 | -112/+123 |
| * | | | Support TWO24 | Eddie Hung | 2019-09-09 | 1 | -1/+59 |
| * | | | Refactor | Eddie Hung | 2019-09-09 | 1 | -33/+33 |
| * | | | Add initial USE_SIMD=FOUR12 support | Eddie Hung | 2019-09-09 | 1 | -0/+157 |
| * | | | Only trim sigM if USE_MULT; only look for ffM then too | Eddie Hung | 2019-09-09 | 1 | -9/+13 |
| * | | | Set USE_MULT and USE_SIMD | Eddie Hung | 2019-09-09 | 1 | -1/+3 |
| * | | | Rename | Eddie Hung | 2019-09-09 | 1 | -27/+27 |
| * | | | Oops | Eddie Hung | 2019-09-09 | 1 | -2/+1 |
| * | | | Tidy up | Eddie Hung | 2019-09-09 | 1 | -6/+5 |
| * | | | Refactor using subpattern in_dffe | Eddie Hung | 2019-09-09 | 1 | -240/+146 |
| * | | | Update macc test | Eddie Hung | 2019-09-06 | 2 | -42/+42 |
| * | | | Pack CREG | Eddie Hung | 2019-09-06 | 2 | -31/+111 |
| * | | | Use unextend lambda | Eddie Hung | 2019-09-06 | 1 | -19/+18 |
| * | | | Fix ffP just like ffPmux | Eddie Hung | 2019-09-06 | 1 | -4/+4 |
| * | | | Perform D replacement properly | Eddie Hung | 2019-09-06 | 2 | -7/+11 |
| * | | | Add support for DREG | Eddie Hung | 2019-09-06 | 2 | -2/+70 |
| * | | | Fine tune nusers when postAdd | Eddie Hung | 2019-09-06 | 1 | -3/+3 |
| * | | | Fix macc and mul tests | Eddie Hung | 2019-09-06 | 1 | -3/+17 |
| * | | | Fix enable polarity | Eddie Hung | 2019-09-06 | 2 | -14/+14 |
| * | | | Logging for ffAD | Eddie Hung | 2019-09-06 | 1 | -0/+3 |
| * | | | Add support for pre-adder and AD register | Eddie Hung | 2019-09-06 | 2 | -4/+128 |
| * | | | Document (* gentb_skip *) attr for test_autotb | Eddie Hung | 2019-09-06 | 1 | -0/+3 |
| * | | | Tidy up ice40_dsp some more | Eddie Hung | 2019-09-06 | 2 | -14/+13 |
| * | | | Use more index patterns | Eddie Hung | 2019-09-06 | 1 | -15/+19 |
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index : iCE40/yosys | |
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