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| | * | | | | | | | | | | | | | | | Output "h" extension only if boxesEddie Hung2019-08-211-28/+32
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| | * | | | | | | | | | | | | | | | Revert "Fix omode which inserts an output if none exists (otherwise abc9 ↵Eddie Hung2019-08-211-8/+7
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| | * | | | | | | | | | | | | | | | Add abc_arrival to SRL*Eddie Hung2019-08-211-3/+5
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| | * | | | | | | | | | | | | | | | Fix omode which inserts an output if none exists (otherwise abc9 breaks)Eddie Hung2019-08-201-7/+8
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| | * | | | | | | | | | | | | | | | Revert "Only xaig if GetSize(output_bits) > 0"Eddie Hung2019-08-201-149/+147
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| | * | | | | | | | | | | | | | | | Only xaig if GetSize(output_bits) > 0Eddie Hung2019-08-201-147/+149
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| | * | | | | | | | | | | | | | | | OopsEddie Hung2019-08-201-1/+1
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| | * | | | | | | | | | | | | | | | Merge branch 'eddie/fix_techmap' into xaig_arrivalEddie Hung2019-08-204-1/+16
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| | * | | | | | | | | | | | | | | | | techmap -max_iter to apply to each module individuallyEddie Hung2019-08-201-4/+6
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| | * | | | | | | | | | | | | | | | | xilinx to use abc_map.v with -max_iter 1Eddie Hung2019-08-206-171/+26
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| | * | | | | | | | | | | | | | | | | ecp5: remove DPR16X4 from abc_unmap.vEddie Hung2019-08-201-20/+0
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| | * | | | | | | | | | | | | | | | | ecp5 to use -max_iter 1Eddie Hung2019-08-203-4/+3
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| | * | | | | | | | | | | | | | | | | ecp5 to use abc_map.v and _unmap.vEddie Hung2019-08-207-14/+89
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| | * | | | | | | | | | | | | | | | | Add (* abc_arrival=<int> *) docEddie Hung2019-08-201-0/+5
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| | * | | | | | | | | | | | | | | | | Add reference to FD* timingEddie Hung2019-08-201-0/+2
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| | * | | | | | | | | | | | | | | | | Remove sequential extensionEddie Hung2019-08-209-730/+68
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| | * | | | | | | | | | | | | | | | | Remove SRL* delays from cells_sim.vEddie Hung2019-08-201-5/+3
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| | * | | | | | | | | | | | | | | | | retime_mode -> dff_modeEddie Hung2019-08-201-7/+7
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| | * | | | | | | | | | | | | | | | | LUTMUX -> LUTMUX6Eddie Hung2019-08-201-2/+2
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| | * | | | | | | | | | | | | | | | | Cleanup techmap in map_lutsEddie Hung2019-08-201-3/+5
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| | * | | | | | | | | | | | | | | | | Move `techmap abc_map.v` into map_lutsEddie Hung2019-08-201-1/+2
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| | * | | | | | | | | | | | | | | | | Remove delays from abc_map.vEddie Hung2019-08-201-5/+2
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| | * | | | | | | | | | | | | | | | | TypoEddie Hung2019-08-201-1/+1
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| | * | | | | | | | | | | | | | | | | Merge remote-tracking branch 'origin/master' into xaig_dffEddie Hung2019-08-205-16/+23
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| | * | | | | | | | | | | | | | | | | | Do not sigmap!Eddie Hung2019-08-201-2/+2
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| | * | | | | | | | | | | | | | | | | | Deprecate `abc_scc_break` attributeEddie Hung2019-08-201-8/+0
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| | * | | | | | | | | | | | | | | | | | Wrap SRL{16,32} tooEddie Hung2019-08-203-7/+98
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| | * | | | | | | | | | | | | | | | | | Wrap LUTRAMs in order to capture comb/seq behaviourEddie Hung2019-08-205-36/+200
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| | * | | | | | | | | | | | | | | | | | Minor refactorEddie Hung2019-08-201-7/+6
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| | * | | | | | | | | | | | | | | | | | Add LUTRAM delaysEddie Hung2019-08-201-3/+6
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| | * | | | | | | | | | | | | | | | | | Fix use of {CLK,EN}_POLARITY, also add a FIXMEEddie Hung2019-08-201-65/+13
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| | * | | | | | | | | | | | | | | | | | Remove mapping rulesEddie Hung2019-08-201-33/+0
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| | * | | | | | | | | | | | | | | | | | Remove -icellsEddie Hung2019-08-201-2/+2
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| | * | | | | | | | | | | | | | | | | | Use abc_{map,unmap,model}.vEddie Hung2019-08-208-141/+334
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| | * | | | | | | | | | | | | | | | | | Merge remote-tracking branch 'origin/master' into xaig_dffEddie Hung2019-08-2024-112/+857
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| | * \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ Merge remote-tracking branch 'origin/master' into xaig_dffEddie Hung2019-08-1912-71/+81
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| | * | | | | | | | | | | | | | | | | | | | Add arrival times for SRL outputsEddie Hung2019-08-191-3/+5
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| | * | | | | | | | | | | | | | | | | | | | Output i/o/h extensions even if no boxes or flopsEddie Hung2019-08-191-65/+66
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| | * | | | | | | | | | | | | | | | | | | | Add BRAM arrival timesEddie Hung2019-08-191-8/+10
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| | * | | | | | | | | | | | | | | | | | | | Remove debugEddie Hung2019-08-191-1/+1
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| | * | | | | | | | | | | | | | | | | | | | Add reference to source of Tclktoq timingEddie Hung2019-08-191-0/+2
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| | * | | | | | | | | | | | | | | | | | | | Add (* abc_arrival *) attributeEddie Hung2019-08-192-10/+67
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| | * | | | | | | | | | | | | | | | | | | | Add 'abc_arrival' attribute for flop outputsEddie Hung2019-08-191-6/+6
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| | * | | | | | | | | | | | | | | | | | | | Update box timingsEddie Hung2019-08-191-6/+9
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| | * | | | | | | | | | | | | | | | | | | | Move from cell attr to module attrEddie Hung2019-08-192-36/+70
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| | * | | | | | | | | | | | | | | | | | | | Merge remote-tracking branch 'origin/master' into xaig_dffEddie Hung2019-08-1992-1125/+2220
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| | * | | | | | | | | | | | | | | | | | | | | Use attributes instead of paramsEddie Hung2019-08-192-41/+37
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| | * | | | | | | | | | | | | | | | | | | | | Set abc_flop and use it in toposortEddie Hung2019-08-192-31/+52
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| | * | | | | | | | | | | | | | | | | | | | | Use %dEddie Hung2019-08-191-1/+1
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| | * | | | | | | | | | | | | | | | | | | | | Merge branch 'eddie/abc9_refactor' into xaig_dffEddie Hung2019-08-16171-4553/+6775
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