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* ConsistencyEddie Hung2020-01-172-4/+6
* xilinx_dsp: add parameter defaultsEddie Hung2020-01-171-7/+7
* Add #1644 testcaseEddie Hung2020-01-172-0/+2
* synth_ice40: call wreduce before mul2dspEddie Hung2020-01-171-1/+2
* ice40_dsp: add testEddie Hung2020-01-171-0/+11
* ice40_dsp: add default values for parametersEddie Hung2020-01-172-11/+11
* ice40_dsp: tolerant of fanout-less outputs, as well as all-zero inputsEddie Hung2020-01-171-0/+5
* Merge pull request #1639 from YosysHQ/eddie/fix_read_xaigerEddie Hung2020-01-152-2/+14
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| * abc9: aAdd test to check $_NOT_s are absorbedEddie Hung2020-01-151-0/+12
| * read_aiger: $lut prefix in frontEddie Hung2020-01-151-2/+2
* | Merge pull request #1636 from YosysHQ/eddie/fix_synth_xilinx_WMiodrag Milanović2020-01-151-1/+1
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| * synth_xilinx: fix default W value for non-xc7Eddie Hung2020-01-141-1/+1
* | Merge pull request #1635 from YosysHQ/eddie/print_statsEddie Hung2020-01-141-25/+13
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| * | As before, only display MEM if Linux or FreeBSDEddie Hung2020-01-141-3/+7
| * | print_stats footer to return peak memory, option for including childrenEddie Hung2020-01-141-28/+12
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* | Merge pull request #1633 from YosysHQ/eddie/fix_autonameEddie Hung2020-01-142-1/+20
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| * | autoname: do not autoname portsEddie Hung2020-01-141-1/+1
| * | autoname: add testcase with $-prefix-ed portEddie Hung2020-01-141-0/+19
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* | Merge pull request #1632 from YosysHQ/eddie/fix1630Eddie Hung2020-01-145-17/+23
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| * | read_aiger: also rename "$0"Eddie Hung2020-01-141-2/+2
| * | read_aiger: uniquify wires with $aiger<autoidx> prefixEddie Hung2020-01-132-9/+13
| * | Add #1630 testcaseEddie Hung2020-01-132-0/+2
| * | read_aiger: make $and/$not/$lut the prefix not suffixEddie Hung2020-01-132-9/+9
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* | Merge pull request #1623 from YosysHQ/mmicko/edif_attrMiodrag Milanović2020-01-145-35/+46
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| * this one is fineMiodrag Milanovic2020-01-101-3/+3
| * Fix testsMiodrag Milanovic2020-01-103-12/+11
| * remove whitespaceMiodrag Milanovic2020-01-101-1/+1
| * Use CARRY4 for abc1 as well, preventing issues with VivadoMiodrag Milanovic2020-01-101-1/+1
| * Export wire properties as well in EDIFMiodrag Milanovic2020-01-101-26/+38
* | Merge pull request #1620 from YosysHQ/eddie/abc9_scratchpadEddie Hung2020-01-136-36/+147
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| * | Another conflictEddie Hung2020-01-111-1/+0
| * | MIssed this merge conflictEddie Hung2020-01-111-4/+0
| * | Merge remote-tracking branch 'origin/master' into eddie/abc9_scratchpadEddie Hung2020-01-115-86/+118
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| * | | abc9: fix help message, found by @nakengelhardtEddie Hung2020-01-111-2/+2
| * | | Copy-pastaEddie Hung2020-01-101-1/+1
| * | | synth_xilinx: synth_xilinx.abc9.xc7.W to replace XC7_WIRE_DELAY macroEddie Hung2020-01-101-4/+11
| * | | abc9: add abc9.verify and abc9.debug optionsEddie Hung2020-01-101-1/+13
| * | | abc9: fix typosEddie Hung2020-01-101-4/+4
| * | | Add abc9 sanity testEddie Hung2020-01-091-0/+40
| * | | Tune abc9.script.flowEddie Hung2020-01-091-6/+14
| * | | Add '-v' to &if for abc9.script.default.fastEddie Hung2020-01-091-1/+1
| * | | abc9: start post-fix with semicolonEddie Hung2020-01-091-1/+1
| * | | abc9.script.* constpad entries to start with '+'Eddie Hung2020-01-091-8/+8
| * | | Revert "abc9: if -script value is a file, then source it, otherwise commands"Eddie Hung2020-01-091-16/+11
| * | | Move abc9.* constpad entries to Abc9Pass::on_register()Eddie Hung2020-01-092-35/+37
| * | | Merge remote-tracking branch 'origin/clifford/onpassreg' into eddie/abc9_scra...Eddie Hung2020-01-093-1/+20
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| * | | | Add abc9.if.script.flow{,2} to constpadEddie Hung2020-01-081-6/+32
| * | | | scratchpad entry abc9.if.R to &if -REddie Hung2020-01-081-0/+6
| * | | | abc9: if -script value is a file, then source it, otherwise commandsEddie Hung2020-01-081-11/+16
| * | | | abc9: add time as last script commandEddie Hung2020-01-081-1/+1
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