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| author | Eddie Hung <eddie@fpgeh.com> | 2020-01-15 16:22:49 -0800 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2020-01-15 16:22:49 -0800 |
| commit | 2bda51ac34d6f542d1d6477eecede1d6527c10b3 (patch) | |
| tree | ea8649ffc286b3e81f6d255f619996271c258f64 | |
| parent | abba1541bc18b031625708a966c830b5c1f81283 (diff) | |
| parent | 5918ede9bd7568d5a5156f20fdc4ce215d4968f8 (diff) | |
| download | yosys-2bda51ac34d6f542d1d6477eecede1d6527c10b3.tar.gz yosys-2bda51ac34d6f542d1d6477eecede1d6527c10b3.tar.bz2 yosys-2bda51ac34d6f542d1d6477eecede1d6527c10b3.zip | |
Merge pull request #1639 from YosysHQ/eddie/fix_read_xaiger
read_aiger: $lut prefix in front
| -rw-r--r-- | frontends/aiger/aigerparse.cc | 4 | ||||
| -rw-r--r-- | tests/techmap/abc9.ys | 12 |
2 files changed, 14 insertions, 2 deletions
diff --git a/frontends/aiger/aigerparse.cc b/frontends/aiger/aigerparse.cc index f6b2a639d..a4b1e6fec 100644 --- a/frontends/aiger/aigerparse.cc +++ b/frontends/aiger/aigerparse.cc @@ -1001,9 +1001,9 @@ void AigerReader::post_process() if (cell->type != "$lut") continue; auto y_port = cell->getPort("\\Y").as_bit(); if (y_port.wire->width == 1) - module->rename(cell, stringf("%s$lut", y_port.wire->name.c_str())); + module->rename(cell, stringf("$lut%s", y_port.wire->name.c_str())); else - module->rename(cell, stringf("%s[%d]$lut", y_port.wire->name.c_str(), y_port.offset)); + module->rename(cell, stringf("$lut%s[%d]", y_port.wire->name.c_str(), y_port.offset)); } } diff --git a/tests/techmap/abc9.ys b/tests/techmap/abc9.ys index 20f263da8..62b5dfef6 100644 --- a/tests/techmap/abc9.ys +++ b/tests/techmap/abc9.ys @@ -38,3 +38,15 @@ abc9 -lut 4 design -load gold scratchpad -copy abc9.script.flow3 abc9.script abc9 -lut 4 + + +design -reset +read_verilog -icells <<EOT +module top(input a, b, output o); +assign o = ~(a & b); +endmodule +EOT +abc9 -lut 4 +clean +select -assert-count 1 t:$lut +select -assert-none t:$lut t:* %D |