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author | Eddie Hung <eddie@fpgeh.com> | 2020-01-09 17:49:56 -0800 |
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committer | Eddie Hung <eddie@fpgeh.com> | 2020-01-09 17:49:56 -0800 |
commit | 8b6309747b302f11046be029d5f224ba891d0461 (patch) | |
tree | 2d45c1df121a07c16686ad136aeccde32c5af4e5 | |
parent | 32946a402de068ba052e0af9564959cf746fbf91 (diff) | |
download | yosys-8b6309747b302f11046be029d5f224ba891d0461.tar.gz yosys-8b6309747b302f11046be029d5f224ba891d0461.tar.bz2 yosys-8b6309747b302f11046be029d5f224ba891d0461.zip |
Add '-v' to &if for abc9.script.default.fast
-rw-r--r-- | passes/techmap/abc9.cc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/passes/techmap/abc9.cc b/passes/techmap/abc9.cc index fb0c547a3..aed662fc5 100644 --- a/passes/techmap/abc9.cc +++ b/passes/techmap/abc9.cc @@ -734,7 +734,7 @@ struct Abc9Pass : public Pass { { RTLIL::constpad["abc9.script.default"] = "+&scorr; &sweep; &dc2; &dch -f; &ps; &if {C} {W} {D} {R} -v; &mfs"; RTLIL::constpad["abc9.script.default.area"] = "+&scorr; &sweep; &dc2; &dch -f; &ps; &if {C} {W} {D} {R} -a -v; &mfs"; - RTLIL::constpad["abc9.script.default.fast"] = "+&if {C} {W} {D} {R}"; + RTLIL::constpad["abc9.script.default.fast"] = "+&if {C} {W} {D} {R} -v"; // Based on ABC's &flow RTLIL::constpad["abc9.script.flow"] = "+&scorr; &sweep;" \ /* Round 1 */ \ |