aboutsummaryrefslogtreecommitdiffstats
Commit message (Expand)AuthorAgeFilesLines
* Further cleanup based on @daveshah1Eddie Hung2019-06-144-47/+47
* Resolve comments from @daveshah1Eddie Hung2019-06-143-17/+11
* Add XC7_WIRE_DELAY macro to synth_xilinx.ccEddie Hung2019-06-141-1/+3
* Update delays based on SymbiFlow/prjxray-dbEddie Hung2019-06-141-12/+13
* Rename +/xilinx/abc.{box,lut} -> abc_xc7.{box,lut}Eddie Hung2019-06-144-3/+3
* Comment out dist RAM boxing on ECP5 for nowEddie Hung2019-06-141-1/+1
* Remove WIP ABC9 flop supportEddie Hung2019-06-145-79/+79
* Merge remote-tracking branch 'origin/master' into xaigEddie Hung2019-06-142-0/+46
|\
| * Merge pull request #829 from abdelrahmanhosny/masterSerge Bazanski2019-06-132-0/+46
| |\
| | * address review commentsAbdelrahman2019-03-011-23/+9
| | * add dockerignore fileAbdelrahman2019-02-261-0/+13
| | * dockerize yosysAbdelrahman2019-02-261-0/+47
* | | Make doc consistentEddie Hung2019-06-143-3/+6
* | | CleanupEddie Hung2019-06-141-1/+0
* | | Merge branch 'xaig' of github.com:YosysHQ/yosys into xaigEddie Hung2019-06-148-72/+194
|\ \ \
| * \ \ Merge pull request #1097 from YosysHQ/dave/xaig_ecp5Eddie Hung2019-06-148-72/+194
| |\ \ \
| | * | | ecp5: Add abc9 optionDavid Shah2019-06-148-72/+194
| |/ / /
* | | | CleanupEddie Hung2019-06-141-7/+3
* | | | Cleanup/optimise toposort in write_xaigerEddie Hung2019-06-141-54/+47
* | | | Remove extra semicolonEddie Hung2019-06-141-1/+1
* | | | Add TODO to parse_xaigerEddie Hung2019-06-141-0/+1
|/ / /
* | | Optimise some moreEddie Hung2019-06-131-58/+53
* | | Move ConstEvalAig to aigerparse.ccEddie Hung2019-06-132-160/+161
* | | Fix name clashEddie Hung2019-06-131-4/+8
* | | More slimmingEddie Hung2019-06-131-35/+35
* | | Add ConstEvalAig specialised for AIGsEddie Hung2019-06-132-3/+159
* | | Update CHANGELOG with "synth -abc9"Eddie Hung2019-06-131-0/+1
* | | Fix LP SB_LUT4 timingEddie Hung2019-06-131-1/+1
* | | More accurate CHANGELOGEddie Hung2019-06-131-1/+3
* | | Update CHANGELOGEddie Hung2019-06-121-0/+1
* | | Rip out all non FPGA stuff from abc9Eddie Hung2019-06-121-343/+111
* | | Fix spellingEddie Hung2019-06-121-1/+1
* | | Revert "For 'stat' do not count modules with abc_box_id"Eddie Hung2019-06-121-3/+0
* | | Revert "Merge remote-tracking branch 'origin/eddie/muxpack' into xc7mux"Eddie Hung2019-06-122-247/+0
* | | Move neg-pol to pos-pol mapping from ff_map to cells_map.vEddie Hung2019-06-121-0/+8
* | | Be more precise when connecting during ABC9 re-integrationEddie Hung2019-06-121-1/+3
* | | Remove unnecessary undriven_bits.insertEddie Hung2019-06-121-4/+1
* | | Remove hacky wideports_split from abc9Eddie Hung2019-06-121-52/+4
* | | Fix compile errors when #if 1 for debugEddie Hung2019-06-121-7/+8
* | | parse_xaiger to cope with inoutsEddie Hung2019-06-121-6/+0
* | | write_xaiger to preserve POs even if driven by constantEddie Hung2019-06-121-7/+6
* | | Add a couple more testsEddie Hung2019-06-122-21/+30
* | | Do not call abc9 if no outputsEddie Hung2019-06-121-54/+65
* | | More write_xaiger cleanupEddie Hung2019-06-122-41/+13
* | | Cleanup write_xaigerEddie Hung2019-06-121-92/+6
* | | ConsistencyEddie Hung2019-06-124-4/+4
* | | Reduce diff with masterEddie Hung2019-06-121-1/+1
* | | Remove abc_flop{,_d} attributes from ice40/cells_sim.vEddie Hung2019-06-121-40/+20
* | | Fix spacingEddie Hung2019-06-121-6/+6
* | | Remove wide mux inferenceEddie Hung2019-06-125-195/+3