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author | Eddie Hung <eddie@fpgeh.com> | 2019-04-28 12:36:04 -0700 |
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committer | Eddie Hung <eddie@fpgeh.com> | 2019-06-12 16:07:24 -0700 |
commit | 009255d11d37beaeca95a59e5b484d44b39b980a (patch) | |
tree | 51640d478732c31d4746cf372b0eaea5cde1dc09 | |
parent | b3faf0246d46f31027ce2aade410e4325822b121 (diff) | |
download | yosys-009255d11d37beaeca95a59e5b484d44b39b980a.tar.gz yosys-009255d11d37beaeca95a59e5b484d44b39b980a.tar.bz2 yosys-009255d11d37beaeca95a59e5b484d44b39b980a.zip |
Move neg-pol to pos-pol mapping from ff_map to cells_map.v
-rw-r--r-- | techlibs/xilinx/cells_map.v | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/techlibs/xilinx/cells_map.v b/techlibs/xilinx/cells_map.v index 6b92d2ea9..8291f5647 100644 --- a/techlibs/xilinx/cells_map.v +++ b/techlibs/xilinx/cells_map.v @@ -18,6 +18,14 @@ * */ +// Convert negative-polarity reset to positive-polarity +module \$_DFF_NN0_ (input D, C, R, output Q); \$_DFF_NP0_ _TECHMAP_REPLACE_ (.D(D), .Q(Q), .C(C), .R(~R)); endmodule +module \$_DFF_PN0_ (input D, C, R, output Q); \$_DFF_PP0_ _TECHMAP_REPLACE_ (.D(D), .Q(Q), .C(C), .R(~R)); endmodule + +module \$_DFF_NN1_ (input D, C, R, output Q); \$_DFF_NP1 _TECHMAP_REPLACE_ (.D(D), .Q(Q), .C(C), .R(~R)); endmodule +module \$_DFF_PN1_ (input D, C, R, output Q); \$_DFF_PP1 _TECHMAP_REPLACE_ (.D(D), .Q(Q), .C(C), .R(~R)); endmodule + + module \$__SHREG_ (input C, input D, input E, output Q); parameter DEPTH = 0; parameter [DEPTH-1:0] INIT = 0; |