| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | Bump version | github-actions[bot] | 2021-11-06 | 1 | -1/+1 |
| * | Next dev cycle | Miodrag Milanovic | 2021-11-05 | 2 | -2/+5 |
| * | Release version 0.11 | Miodrag Milanovic | 2021-11-05 | 2 | -3/+3 |
| * | Must use latest flex to generate c++17 compatible code | Miodrag Milanovic | 2021-11-05 | 1 | -2/+4 |
| * | Make it work on all | Miodrag Milanovic | 2021-11-05 | 2 | -5/+5 |
| * | Correct way of setting maybe_unsused on labels | Miodrag Milanovic | 2021-11-05 | 1 | -4/+2 |
| * | Add missing changelog item | Miodrag Milanovic | 2021-11-05 | 1 | -0/+1 |
| * | Update command reference | Miodrag Milanovic | 2021-11-05 | 1 | -0/+17 |
| * | Merge pull request #3067 from YosysHQ/aki/ci_update | Miodrag Milanović | 2021-11-05 | 4 | -101/+293 |
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| | * | ci: removed the old `test.yml` workflow, as it was replaced by `test-linux.ym... | Aki Van Ness | 2021-10-31 | 1 | -91/+0 |
| | * | ci: expanded the macOS tests suite to cover more compilers and C++ versions | Aki Van Ness | 2021-10-31 | 1 | -0/+157 |
| | * | ci: expanded the Linux test suite to cover more compilers and C++ versions | Aki Van Ness | 2021-10-31 | 1 | -0/+125 |
| | * | Changed the Makefile to have an explicit `CXXSTD` parameter which allows for ... | Aki Van Ness | 2021-10-31 | 1 | -10/+11 |
| * | | Removed semicolon from macro | Miodrag Milanovic | 2021-11-05 | 1 | -1/+1 |
| * | | Bump version | github-actions[bot] | 2021-11-03 | 1 | -1/+1 |
| * | | flatten: Keep sigmap around between flatten_cell invocations. | Marcelina Kościelnicka | 2021-11-02 | 1 | -3/+4 |
| * | | Bump version | github-actions[bot] | 2021-11-02 | 1 | -1/+1 |
| * | | Merge pull request #3068 from YosysHQ/claire/verific_cfg | Claire Xen | 2021-11-01 | 1 | -2/+75 |
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| | * | | Add "verific -cfg" command | Claire Xenia Wolf | 2021-11-01 | 1 | -2/+75 |
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| * / | Bump version | github-actions[bot] | 2021-11-01 | 1 | -1/+1 |
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| * | Merge pull request #3066 from YosysHQ/claire/verific_gclk | Claire Xen | 2021-10-31 | 1 | -12/+67 |
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| | * | Fix verific gclk handling for async-load FFs | Claire Xenia Wolf | 2021-10-31 | 1 | -12/+67 |
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| * | Bump version | github-actions[bot] | 2021-10-30 | 1 | -1/+1 |
| * | Add missing items in CHANGELOG | Miodrag Milanovic | 2021-10-29 | 1 | -0/+6 |
| * | Update command reference part of manual | Miodrag Milanovic | 2021-10-29 | 1 | -340/+1444 |
| * | Bump version | github-actions[bot] | 2021-10-28 | 1 | -1/+1 |
| * | Merge pull request #3063 from YosysHQ/micko/verific_aldff | Miodrag Milanović | 2021-10-27 | 2 | -8/+1 |
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| | * | Enable async load dff emit by default in Verific | Miodrag Milanovic | 2021-10-27 | 1 | -1/+1 |
| | * | Revert "Compile option for enabling async load verific support" | Miodrag Milanovic | 2021-10-27 | 2 | -8/+1 |
| * | | ecp5: Add support for mapping aldff. | Marcelina Kościelnicka | 2021-10-27 | 2 | -13/+13 |
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| * | proc_dff: Emit $aldff. | Marcelina Kościelnicka | 2021-10-27 | 1 | -32/+7 |
| * | dfflegalize: Add tests for aldff lowering. | Marcelina Kościelnicka | 2021-10-27 | 2 | -0/+240 |
| * | dfflegalize: Add tests targetting aldff. | Marcelina Kościelnicka | 2021-10-27 | 7 | -7/+320 |
| * | dfflegalize: Refactor, add aldff support. | Marcelina Kościelnicka | 2021-10-27 | 12 | -1053/+1137 |
| * | Bump version | github-actions[bot] | 2021-10-27 | 1 | -1/+1 |
| * | verilog: use derived module info to elaborate cell connections | Zachary Snow | 2021-10-25 | 15 | -42/+397 |
| * | Split out logic for reprocessing an AstModule | Rupert Swarbrick | 2021-10-25 | 5 | -28/+61 |
| * | Bump version | github-actions[bot] | 2021-10-26 | 1 | -1/+1 |
| * | Compile option for enabling async load verific support | Miodrag Milanovic | 2021-10-25 | 2 | -1/+8 |
| * | Bump version | github-actions[bot] | 2021-10-22 | 1 | -1/+1 |
| * | Change implicit conversions from bool to Sig* to explicit. | Marcelina Kościelnicka | 2021-10-21 | 2 | -6/+8 |
| * | Merge pull request #3057 from YosysHQ/claire/verific_latches | Claire Xen | 2021-10-21 | 1 | -4/+61 |
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| | * | Fix verific.cc PRIM_DLATCH handling | Claire Xenia Wolf | 2021-10-21 | 1 | -1/+7 |
| | * | Initial Verific impoter support for {PRIM,WIDE_OPER}_DLATCH{,RS} | Claire Xenia Wolf | 2021-10-21 | 1 | -4/+55 |
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| * | extract_reduce: Refactor and fix input signal construction. | Marcelina Kościelnicka | 2021-10-21 | 2 | -63/+46 |
| * | Bump version | github-actions[bot] | 2021-10-21 | 1 | -1/+1 |
| * | If verific have vhdl lib it is required by other libs | Miodrag Milanovic | 2021-10-20 | 1 | -0/+4 |
| * | Forgot to remove from main list | Miodrag Milanovic | 2021-10-20 | 1 | -1/+1 |
| * | Option to disable verific VHDL support | Miodrag Milanovic | 2021-10-20 | 3 | -11/+50 |
| * | Bump version | github-actions[bot] | 2021-10-20 | 1 | -1/+1 |
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index : iCE40/yosys | |
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