| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | Fix gcc warning of potentially uninitialised | Eddie Hung | 2019-06-20 | 1 | -2/+2 |
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| * | write_xaiger to flatten 1'bx/1'bz to 1'b0 again | Eddie Hung | 2019-06-20 | 1 | -2/+4 |
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| * | Fix simple_abc9/generate test with 1'bx at MSB | Eddie Hung | 2019-06-20 | 1 | -1/+1 |
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| * | Fix different abc9 test | Eddie Hung | 2019-06-20 | 1 | -2/+3 |
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| * | Fix broken abc9.v test due to inout being 1'bx | Eddie Hung | 2019-06-20 | 2 | -5/+21 |
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| * | Run simple_abc9 tests | Eddie Hung | 2019-06-20 | 1 | -0/+1 |
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| * | Merge remote-tracking branch 'origin/master' into xaig | Eddie Hung | 2019-06-20 | 31 | -50/+250 |
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| | * | Fix typo, fixes #1095 | Clifford Wolf | 2019-06-20 | 1 | -1/+1 |
| | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
| | * | Improve shregmap help message, fixes #1113 | Clifford Wolf | 2019-06-20 | 1 | -0/+2 |
| | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
| | * | Update some .gitignore files | Clifford Wolf | 2019-06-20 | 2 | -3/+3 |
| | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
| | * | Fix typo | Clifford Wolf | 2019-06-20 | 1 | -2/+2 |
| | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
| | * | Merge branch 'towoe-unpacked_arrays' | Clifford Wolf | 2019-06-20 | 2 | -1/+23 |
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| | | * | Add proper test for SV-style arrays | Clifford Wolf | 2019-06-20 | 3 | -6/+16 |
| | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
| | | * | Merge branch 'unpacked_arrays' of https://github.com/towoe/yosys-sv into ↵ | Clifford Wolf | 2019-06-20 | 3 | -1/+13 |
| | |/| | | | | | | | | | | towoe-unpacked_arrays | ||||
| | | * | Unpacked array declaration using size | Tobias Wölfel | 2019-06-19 | 3 | -1/+13 |
| | | | | | | | | | | | | | | | | | | | | | | | | | Allows fixed-sized array dimension specified by a single number. This commit is based on the work from PeterCrozier https://github.com/YosysHQ/yosys/pull/560. But is split out of the original work. | ||||
| | * | | Merge pull request #1111 from acw1251/help_summary_fixes | Eddie Hung | 2019-06-19 | 4 | -6/+6 |
| | |\ \ | | | | | | | | | Fixed the help summary line for a few commands | ||||
| | | * | | Fixed small typo in ice40_unlut help summary | acw1251 | 2019-06-19 | 1 | -1/+1 |
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| | | * | | Fixed the help summary line for a few commands | acw1251 | 2019-06-19 | 4 | -6/+6 |
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| | * | | Fix bug in #1078, add entry to CHANGELOG | Eddie Hung | 2019-06-19 | 2 | -3/+4 |
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| | * | | Merge pull request #1109 from YosysHQ/clifford/fix1106 | Clifford Wolf | 2019-06-19 | 6 | -9/+48 |
| | |\ \ | | | | | | | | | Add "read_verilog -pwires" feature | ||||
| | | * | | Add "read_verilog -pwires" feature, closes #1106 | Clifford Wolf | 2019-06-19 | 6 | -9/+48 |
| | |/ / | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
| | * | | Merge pull request #1105 from YosysHQ/clifford/fixlogicinit | Clifford Wolf | 2019-06-19 | 5 | -16/+92 |
| | |\ \ | | | | | | | | | Improve handling of initial/default values | ||||
| | | * | | Add defvalue test, minor autotest fixes for .sv files | Clifford Wolf | 2019-06-19 | 2 | -14/+37 |
| | | | | | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
| | | * | | Use input default values in hierarchy pass | Clifford Wolf | 2019-06-19 | 1 | -0/+38 |
| | | | | | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
| | | * | | Add defaultvalue attribute | Clifford Wolf | 2019-06-19 | 2 | -0/+15 |
| | | | | | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
| | | * | | Fix handling of "logic" variables with initial value | Clifford Wolf | 2019-06-19 | 1 | -2/+2 |
| | | | | | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
| | * | | | Make tests/aiger less chatty | Clifford Wolf | 2019-06-19 | 1 | -4/+6 |
| | |/ / | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
| | * | | Merge pull request #1100 from bwidawsk/home | Clifford Wolf | 2019-06-19 | 5 | -0/+8 |
| | |\ \ | | | | | | | | | Support ~ in filename parsing | ||||
| | | * | | Support filename rewrite in backends | Ben Widawsky | 2019-06-18 | 4 | -0/+4 |
| | | | | | | | | | | | | | | | | | Signed-off-by: Ben Widawsky <ben@bwidawsk.net> | ||||
| | | * | | Support ~ for home directory | Ben Widawsky | 2019-06-18 | 1 | -0/+4 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is tested on Linux only v2: Wrap functioanlity in ifndef _WIN32 (eddiehung) Find '~/' instead of '~' (cliffordwolf) Signed-off-by: Ben Widawsky <ben@bwidawsk.net> | ||||
| | * | | | Merge pull request #1104 from whitequark/case-semantics | Clifford Wolf | 2019-06-19 | 2 | -1/+40 |
| | |\ \ \ | | |/ / | |/| | | Clarify switch/case semantics in RTLIL | ||||
| | | * | | Explain exact semantics of switch and case rules in the manual. | whitequark | 2019-06-19 | 1 | -0/+12 |
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| | | * | | In RTLIL::Module::check(), check process invariants. | whitequark | 2019-06-19 | 1 | -1/+28 |
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| | * | | Merge pull request #1086 from udif/pr_elab_sys_tasks2 | Clifford Wolf | 2019-06-18 | 2 | -3/+13 |
| | |\ \ | | |/ | |/| | Fixed broken $error()/$info/$warning() on non-generate blocks (within always/initial blocks) | ||||
| | | * | Fixed brojen $error()/$info/$warning() on non-generate blocks | Udi Finkelstein | 2019-06-11 | 2 | -3/+13 |
| | | | | | | | | | | | | | (within always/initial blocks) | ||||
| | * | | Add timescale and generated-by header to yosys-smtbmc MkVcd | Clifford Wolf | 2019-06-16 | 1 | -0/+2 |
| | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
| * | | | Fix issue with part of PI being 1'bx | Eddie Hung | 2019-06-20 | 2 | -4/+11 |
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| * | | | Call opt_expr -mux_undef to get rid of 1'bx in muxes prior to abc | Eddie Hung | 2019-06-20 | 1 | -0/+1 |
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| * | | | Handle COs driven by 1'bx | Eddie Hung | 2019-06-20 | 1 | -3/+9 |
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| * | | | Do not call "setundef -zero" in abc9 | Eddie Hung | 2019-06-20 | 1 | -5/+2 |
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| * | | | write_xaiger to skip POs driven by 1'bx | Eddie Hung | 2019-06-20 | 1 | -3/+7 |
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| * | | | Really permute Xilinx LUT mappings as default LUT6.I5:A6 | Eddie Hung | 2019-06-18 | 1 | -16/+16 |
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| * | | | Revert "Fix (do not) permute LUT inputs, but permute mux selects" | Eddie Hung | 2019-06-18 | 1 | -33/+31 |
| | | | | | | | | | | | | | This reverts commit da3d2eedd2b6391621e81b3eaaa28a571e058f9d. | ||||
| * | | | Clean up | Eddie Hung | 2019-06-18 | 1 | -6/+4 |
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| * | | | Fix (do not) permute LUT inputs, but permute mux selects | Eddie Hung | 2019-06-18 | 1 | -31/+33 |
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| * | | | Fix copy-pasta issue | Eddie Hung | 2019-06-17 | 1 | -9/+8 |
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| * | | | Permute INIT for +/xilinx/lut_map.v | Eddie Hung | 2019-06-17 | 1 | -32/+58 |
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| * | | | Simplify comment | Eddie Hung | 2019-06-17 | 1 | -1/+1 |
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| * | | | Update LUT7/8 delays to take account for [ABC]OUTMUX delay | Eddie Hung | 2019-06-17 | 1 | -5/+5 |
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| * | | | &scorr before &sweep, remove &retime as recommended | Eddie Hung | 2019-06-17 | 1 | -1/+1 |
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