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* vhdl-sem_names: avoid a crash on parenthesis ofTristan Gingold2019-07-151-2/+2
* find_top_entity: avoid crash on missing entity, handleTristan Gingold2019-07-152-13/+27
* ghdlsynth: check top entity can be a top entity.Tristan Gingold2019-07-143-4/+6
* vhdl: refactoring: remove configure function with string access.Tristan Gingold2019-07-144-29/+14
* vhdl: set location on reference to the anonymous signal declaration.Tristan Gingold2019-07-141-0/+1
* vhdl: fixes in find_top_entity (handle for-generate, remove early return)Tristan Gingold2019-07-142-5/+27
* vhdl: cleanup in clear_instantiation_configuration.Tristan Gingold2019-07-134-70/+23
* simul-elaboration: rewrite assertion.Tristan Gingold2019-07-131-3/+3
* vhdl-configuration: improve error message.Tristan Gingold2019-07-111-1/+1
* vhdl: minor reformating.Tristan Gingold2019-07-112-8/+5
* vhdl-sem_lib: save and restore nbr_errors inTristan Gingold2019-07-111-0/+10
* libghdl: import Free_Dependence_List.Tristan Gingold2019-07-112-0/+4
* vhdl-nodes: add commentsTristan Gingold2019-07-111-0/+16
* synth: do not crash on use of std_logic_1164 2008.Tristan Gingold2019-07-101-10/+4
* vhdl: improve an error message.Tristan Gingold2019-07-101-1/+1
* vhdl-sem_lib: Load_Parse_Design_Unit: ignore checksum ifTristan Gingold2019-07-091-3/+6
* vhdl-sem_lib: free_dependencies: only free entity aspect.Tristan Gingold2019-07-091-3/+19
* libghdl: automatically set the prefix from shared libraryTristan Gingold2019-07-092-0/+8
* vhdl: report an error in case of missing binding indication in config spec.Tristan Gingold2019-07-091-11/+21
* vhdl simul-elaboration: minor rewrite.Tristan Gingold2019-07-081-3/+1
* vhdl-annotations: partial revert of previous patch forTristan Gingold2019-07-041-0/+10
* synth: handle some "/=".Tristan Gingold2019-07-041-0/+20
* vhdl/translate: reindent.Tristan Gingold2019-07-041-1/+1
* vhdl: rename Cover_Statement to Cover_Directive.Tristan Gingold2019-07-0417-57/+57
* parse: improve error message for incorrect use of '!'.Tristan Gingold2019-07-041-0/+4
* vhdl: parse and analyze restrict directive.Tristan Gingold2019-07-0416-109/+257
* Move pnodes.py.py to xtools directory.Tristan Gingold2019-07-041-1/+1
* synth: handle vhdl2008 std_logic_1164, handle anonymous_signal.Tristan Gingold2019-07-041-2/+2
* vhdl: translate anonymous_signal_declaration.Tristan Gingold2019-07-034-9/+8
* vhdl: avoid a crash on label parenthesis.Tristan Gingold2019-07-031-0/+1
* vhdl: add anonymous_signal_declaration.Tristan Gingold2019-07-0318-186/+384
* synth: handle concurrent assertions.Tristan Gingold2019-07-021-1/+2
* vhdl: adjust python pathes in Makefile.Tristan Gingold2019-07-021-9/+11
* vhdl: improve error message.Tristan Gingold2019-07-011-2/+1
* vhdl: recognize more predefined std_logic_unsigned functions.Tristan Gingold2019-06-302-0/+24
* synth: handle std_logic_unsigned."+"Tristan Gingold2019-06-302-0/+15
* vhdl: recognize std_logic_unsignedTristan Gingold2019-06-294-1/+155
* ghdl_jit: almost add ghdlsynthTristan Gingold2019-06-292-234/+0
* vhdl: move annotations from simul to vhdl.Tristan Gingold2019-06-298-10/+10
* vhdl: recognize some functions of math_real.Tristan Gingold2019-06-285-3/+91
* Error_Msg_Option: do not raise exception.Tristan Gingold2019-06-254-10/+19
* synth: handle discrete choice in case statements.Tristan Gingold2019-06-231-5/+5
* vhdl: recognize more numeric_std predefined functions.Tristan Gingold2019-06-232-0/+55
* vhdl-sem_names: do not crash on user attribute onTristan Gingold2019-06-201-1/+2
* vhdl: recognize to_integer/to_signed/to_unsigned.Tristan Gingold2019-06-202-0/+59
* synth: get rid of execution and elaboration.Tristan Gingold2019-06-192-40/+56
* vhdl: decouple annotations from environments.Tristan Gingold2019-06-198-204/+190
* fix: move src/xtools to python/xtools (#846)1138-4EB2019-06-171-2/+2
* Rework libghdl build/install procedure (#840)1138-4EB2019-06-1729-5825/+0
* vhdl-sem_expr: set string type in case of error.Tristan Gingold2019-06-131-9/+12