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* vhdl-sem_assocs: relax constrained on type conversion of formalTristan Gingold2023-05-011-3/+19
* vhdl-sem_expr: adjust check of aggregate rangeTristan Gingold2023-05-012-3/+8
* vhdl-sem_specs: allow attribute specification on a type if -frelaxedTristan Gingold2023-04-301-10/+21
* translate: adjust bounds handling in procedure calls.Tristan Gingold2023-04-303-22/+45
* vhdl-evaluation: some ieee functions return a subtypeTristan Gingold2023-04-301-1/+1
* translate: fix use on subtype attribute in signal declarationTristan Gingold2023-04-282-20/+22
* vhdl-configuration(Find_Top_Entity): avoid a crash after an errorTristan Gingold2023-04-231-0/+11
* trans-chap7: optimize is_a_derived_type for #2417Tristan Gingold2023-04-201-5/+20
* vhdl: recognize conv_signed. For #2408Tristan Gingold2023-04-142-0/+13
* trans-chap2: handle more package instantiationsTristan Gingold2023-04-131-26/+48
* translate: improve support of nested uninstantiated packagesTristan Gingold2023-04-133-35/+105
* translate: refactoring for subprg_translate_kindTristan Gingold2023-04-134-9/+21
* translate: fix elaboration of nested uninstantiated package.Tristan Gingold2023-04-131-7/+31
* translate: more refactoring for packagesTristan Gingold2023-04-131-73/+87
* translate: refactor subprograms translation for packagesTristan Gingold2023-04-133-34/+78
* translate: refactorize translate_package_internalTristan Gingold2023-04-121-100/+121
* translate: refactor prefixes for packagesTristan Gingold2023-04-121-37/+34
* translate: refactoring for package unitsTristan Gingold2023-04-123-58/+108
* translate: add elab_package_declarationTristan Gingold2023-04-123-3/+13
* translate: add Elab_Package_Unit_Without_BodyTristan Gingold2023-04-123-1/+7
* trans-chap2: add commentsTristan Gingold2023-04-081-0/+5
* translation: minor cleanup (remove unreachable code)Tristan Gingold2023-04-081-6/+0
* trans-chap2: defer body elaboration if non-immediate bodyTristan Gingold2023-04-081-6/+9
* translation: improve type conversion (recurse)Tristan Gingold2023-04-073-82/+120
* translate: factorize and improve implicit subtype conversion codeTristan Gingold2023-04-072-132/+124
* trans-chap7: fix incorrect element layout for concatenationTristan Gingold2023-04-071-6/+18
* translate: rework subtype conversion. Fix #2356Tristan Gingold2023-03-294-14/+160
* vhdl-nodes_gc: initial support of PSL nodesTristan Gingold2023-03-271-16/+85
* vhdl-evaluation: free temporary nodeTristan Gingold2023-03-271-2/+3
* trans-chap8: free nodes created by canon for conditional assignmentTristan Gingold2023-03-271-5/+23
* vhdl-sem_types: free temporary nodesTristan Gingold2023-03-271-9/+24
* eval_static_expr_orig: free temporary node for range attributesTristan Gingold2023-03-261-17/+64
* translate_entity_init_ports: free a temporary nodeTristan Gingold2023-03-261-0/+4
* sem_name_clean_1: also free namesTristan Gingold2023-03-261-4/+9
* finish_sem_name_1: free unused nodeTristan Gingold2023-03-261-0/+1
* eval_static_expr: improve tracking of originTristan Gingold2023-03-261-32/+47
* Canon_Concurrent_Simple_Signal_Assignment: avoid leakTristan Gingold2023-03-261-2/+4
* trans-chap8(translate_wait_statement): free sensitivity listTristan Gingold2023-03-261-1/+6
* vhdl-canon: rewrite Canon_Concurrent_Conditional_Signal_AssignmentTristan Gingold2023-03-261-19/+23
* vhdl-canon: free temporary nodes created for configurationTristan Gingold2023-03-261-0/+28
* vhdl: add Owned_Instance_Package_Body to handle ownershipTristan Gingold2023-03-266-243/+297
* Sem_Array_Aggregate: free subtype definitions if not used.Tristan Gingold2023-03-261-0/+19
* vhdl-canon: fix ownership on creation of configuration_declarationTristan Gingold2023-03-231-1/+1
* vhdl-std_package: declare missing wildcard typesTristan Gingold2023-03-231-0/+7
* vhdl: make instance_package_body forward_ref, adjustTristan Gingold2023-03-234-4/+5
* vhdl-sem_scopes: avoid duplicate hidden warningTristan Gingold2023-03-221-0/+5
* vhdl: generate and handle package_instantiation_bodyTristan Gingold2023-03-225-11/+108
* vhdl: add Set/Get_Immediate_Body_Flag (for package instantiation)Tristan Gingold2023-03-224-239/+42
* vhdl: add iir_kind_package_instantiation_bodyTristan Gingold2023-03-228-2/+283
* vhdl-canon(canon_declaration): now a procedure, adjustTristan Gingold2023-03-221-40/+12
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