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* simul: psl default clock, unaffected waveform.Tristan Gingold2017-12-053-0/+8
* simul: handle interface subprogram.Tristan Gingold2017-12-053-11/+26
* simul: handle package interface, remove iir_value_environment.Tristan Gingold2017-12-059-80/+25
* simul: handle instantiated package.Tristan Gingold2017-12-054-11/+46
* simul: add support for case generate statetement.Tristan Gingold2017-12-044-14/+68
* simul: support nested packages.Tristan Gingold2017-12-042-58/+71
* simul: WIP for nested packages.Tristan Gingold2017-12-042-3/+7
* simul: add iir_value_instance, remove package_instances.Tristan Gingold2017-12-038-35/+81
* simul: Remove scope_type (unused).Tristan Gingold2017-12-034-186/+14
* simul: add global_info.Tristan Gingold2017-12-036-63/+77
* simul: refactoring: scope is now the corresponding sim_info.Tristan Gingold2017-12-038-112/+119
* python: generate more declarations.Tristan Gingold2017-12-012-2/+12
* Improve error message in case of circular dependency.Tristan Gingold2017-12-012-29/+32
* Rename of Iir_Kinds_Library_UnitTristan Gingold2017-12-0110-100/+107
* Avoid a crash in case of error.Tristan Gingold2017-11-291-1/+1
* Check bounds for constant intialisation.Tristan Gingold2017-11-291-1/+1
* Avoid crash on non-allowed declarations in protected types.Tristan Gingold2017-11-282-2/+9
* trans-chap3: unbox recod in Get_Composite_Base.Tristan Gingold2017-11-273-6/+14
* Create the simul.ads package (for a namespace).Tristan Gingold2017-11-2423-77/+97
* simulation: refactoring (move block_instance to iir_values).Tristan Gingold2017-11-2411-117/+113
* Update python binding for flists.Tristan Gingold2017-11-234-20/+93
* Annotations: minor reformating.Tristan Gingold2017-11-192-24/+15
* sem_names: do not try to analyze a selected element as an expanded name.Tristan Gingold2017-11-191-1/+2
* ghdl_simul: handle obsoleted and optionnal package body.Tristan Gingold2017-11-181-2/+14
* canon: handle unaffected in waveform expression.Tristan Gingold2017-11-181-0/+5
* ghdl_simul: use target bounds for variable assignment of an aggregate.Tristan Gingold2017-11-181-3/+1
* name_table: Add Str_Idx, and Get/Set_Info renamed to Get/Set_Name_Info.Tristan Gingold2017-11-181-2/+2
* ghdl_simul: fix crash in elaboration.Tristan Gingold2017-11-181-10/+7
* Fix missing open_temp/close_temp for selected sequential signal assignment.Tristan Gingold2017-11-171-2/+3
* Fix incorrect analysis message on unbounded array.Tristan Gingold2017-11-171-7/+13
* simulate: add per signal id.Tristan Gingold2017-11-163-2/+20
* simulate: add port map.Tristan Gingold2017-11-163-16/+29
* simulate: add extra_slot.Tristan Gingold2017-11-162-7/+22
* Drivers: add --pre-elab (as a stub).Tristan Gingold2017-11-161-8/+27
* Abstract Translate_Enumeration_LiteralTristan Gingold2017-11-162-11/+15
* scan_literal: avoid possible CE related to uninitialized variable.Tristan Gingold2017-11-131-1/+1
* Adjust ortho_front.adb to use list iterators.Tristan Gingold2017-11-111-12/+11
* Rewrite list implementationTristan Gingold2017-11-112-3/+5
* list: update simulator.Tristan Gingold2017-11-113-30/+31
* Rework list implementation, use iterator.Tristan Gingold2017-11-1123-335/+463
* Update simulate.Tristan Gingold2017-11-087-79/+67
* Remove List_Others, cleanup lists.Tristan Gingold2017-11-086-50/+35
* Remove some deprecated iir_list subtypes.Tristan Gingold2017-11-084-13/+5
* Use flist for entity_name_list.Tristan Gingold2017-11-087-27/+27
* Use flist for disconnection specification and component specification.Tristan Gingold2017-11-0814-93/+133
* Fix regression in nodes_gc.Tristan Gingold2017-11-071-0/+58
* Fix regressions in disp_vhdl.Tristan Gingold2017-11-071-14/+16
* Use flist for group declaration.Tristan Gingold2017-11-076-21/+28
* Use flist for enumerations.Tristan Gingold2017-11-0723-147/+180
* Use Flist for records.Tristan Gingold2017-11-0718-157/+138
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