iCE40/ghdl - [no description]

	Commit message (Expand)	Author	Age	Files	Lines
*	vhdl: report an error in case of missing binding indication in config spec.	Tristan Gingold	2019-07-09	1	-11/+21
*	python: add errorout_console, disp_config.	Tristan Gingold	2019-07-08	2	-0/+6
*	Fix a merge collision.	Tristan Gingold	2019-07-08	1	-154/+84
*	synthesis: add Node instead of Iir.	Tristan Gingold	2019-07-08	1	-10/+10
*	vhdl simul-elaboration: minor rewrite.	Tristan Gingold	2019-07-08	1	-3/+1
*	synth-environement: add comments.	Tristan Gingold	2019-07-08	2	-3/+5
*	Add testcase for #860	Tristan Gingold	2019-07-08	2	-0/+68
*	add info about the structure of the project (#861)	1138-4EB	2019-07-07	3	-16/+59
*	synth: handle simple user function calls.	Tristan Gingold	2019-07-06	6	-18/+89
*	synth: support top-level generics.	Tristan Gingold	2019-07-06	2	-0/+23
*	configure: add --enable-synth (off by default).	Tristan Gingold	2019-07-06	6	-7/+44
*	ghdlsynth.h: follow convention, add comments.	Tristan Gingold	2019-07-04	1	-13/+16
*	vhdl-annotations: partial revert of previous patch for	Tristan Gingold	2019-07-04	2	-1/+12
*	synth: use future states for PSL restrict directive.	Tristan Gingold	2019-07-04	1	-5/+8
*	synth: handle some "/=".	Tristan Gingold	2019-07-04	2	-0/+23
*	libghdlsynth: catch all exceptions.	Tristan Gingold	2019-07-04	1	-0/+3
*	vhdl/translate: reindent.	Tristan Gingold	2019-07-04	1	-1/+1
*	synth: handle PSL restrict directive (WIP).	Tristan Gingold	2019-07-04	2	-1/+111
*	synth: add concat_array function.	Tristan Gingold	2019-07-04	2	-36/+52
*	netlists-disp_vhdl: display initial value of idff.	Tristan Gingold	2019-07-04	1	-19/+32
*	netlists: export new_internal_name.	Tristan Gingold	2019-07-04	1	-4/+10
*	netlists: allow to build idff without a connected D.	Tristan Gingold	2019-07-04	2	-3/+6
*	netlists: add reduce_or/reduce_and gates.	Tristan Gingold	2019-07-04	4	-0/+36
*	netlists: add assume gate.	Tristan Gingold	2019-07-04	5	-3/+29
*	libghdlsynth: decode options.	Tristan Gingold	2019-07-04	3	-76/+104
*	vhdl: rename Cover_Statement to Cover_Directive.	Tristan Gingold	2019-07-04	18	-60/+60
*	parse: improve error message for incorrect use of '!'.	Tristan Gingold	2019-07-04	1	-0/+4
*	vhdl: parse and analyze restrict directive.	Tristan Gingold	2019-07-04	20	-130/+357
*	Move pnodes.py.py to xtools directory.	Tristan Gingold	2019-07-04	2	-4/+1
*	synth: handle vhdl2008 std_logic_1164, handle anonymous_signal.	Tristan Gingold	2019-07-04	5	-17/+30
*	synth: emit an error for non-constant bounds.	Tristan Gingold	2019-07-04	1	-0/+4
*	synth: ignore non object aliases.	Tristan Gingold	2019-07-03	1	-0/+2
*	Add test for previous commit.	Tristan Gingold	2019-07-03	2	-0/+38
*	vhdl: translate anonymous_signal_declaration.	Tristan Gingold	2019-07-03	4	-9/+8
*	testsuite: add a case for previous commit.	Tristan Gingold	2019-07-03	2	-0/+47
*	vhdl: avoid a crash on label parenthesis.	Tristan Gingold	2019-07-03	1	-0/+1
*	vhdl: add anonymous_signal_declaration.	Tristan Gingold	2019-07-03	20	-526/+785
*	synth: handle concurrent assertions.	Tristan Gingold	2019-07-02	7	-1/+50
*	synth-expr: remove useless code.	Tristan Gingold	2019-07-02	1	-5/+1
*	synth-decls: handle initial value for variables and	Tristan Gingold	2019-07-02	1	-5/+4
*	netlists-disp_vhdl: handle xor.	Tristan Gingold	2019-07-02	1	-0/+2
*	synth: fix Idff; fix 'edge and enable'.	Tristan Gingold	2019-07-02	2	-9/+6
*	libghdlsynth: do not depend on ghdlsimul.	Tristan Gingold	2019-07-02	1	-3/+10
*	ghdlsynth_gates.h: rebuild.	Tristan Gingold	2019-07-02	1	-29/+33
*	ghdllocal: fix a typo in an error message.	Tristan Gingold	2019-07-02	1	-1/+1
*	Makefile: automatically rebuild ghdlsynth_gates.h.	Tristan Gingold	2019-07-02	1	-6/+13
*	vhdl: adjust python pathes in Makefile.	Tristan Gingold	2019-07-02	1	-9/+11
*	synth: destroy iterator after for-loop.	Tristan Gingold	2019-07-01	6	-10/+54
*	synth: improve handling of dynamic slices, add a	Tristan Gingold	2019-07-01	1	-3/+30
*	netlists-disp_vhdl: handle dyn_insert, fix mul.	Tristan Gingold	2019-07-01	1	-20/+36