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* synth: handle const record aggregates.Tristan Gingold2019-09-054-21/+64
* testsuite/synth: re-enable stmt01 test.Tristan Gingold2019-09-051-1/+0
* synth: handle non-constant array aggregates.Tristan Gingold2019-09-052-1/+15
* synth: add netlists.concatsTristan Gingold2019-09-053-31/+140
* synth: add value_const_array.Tristan Gingold2019-09-054-18/+68
* synth-disp_vhdl: handle arrays in disp_out_converter.Tristan Gingold2019-09-051-1/+19
* synth: handle const_bit in disp_constant_inline.Tristan Gingold2019-09-041-0/+4
* synth: handle large width in get_net.Tristan Gingold2019-09-042-4/+14
* testsuite: add case for previous commit.Tristan Gingold2019-09-042-0/+18
* vhdl: do not crash on attribute with a type conversion prefix.Tristan Gingold2019-09-041-2/+3
* testsuite/synth: rename disp01 to dispin01Tristan Gingold2019-09-0419-0/+0
* testsuite/synth: add tests for previous commit.Tristan Gingold2019-09-0425-0/+427
* synth-disp_vhdl: handle records for outputs.Tristan Gingold2019-09-041-42/+76
* testsuite/synth: add testcase for previous commit.Tristan Gingold2019-09-0319-0/+381
* synth-disp_vhdl: handle record for input ports.Tristan Gingold2019-09-038-44/+114
* synth: subtype conversion before compare.Tristan Gingold2019-09-031-2/+7
* testsuite: add reproducer for issue #912Tristan Gingold2019-09-023-0/+67
* synth: handle conditional variable assignment.Tristan Gingold2019-09-021-0/+34
* vhdl: renames Conditional_Expression to Conditional_Expression_Chain.Tristan Gingold2019-09-0210-42/+45
* vhdl synth: recognize more operators (add uns log).Tristan Gingold2019-09-024-100/+157
* revert "configure: fix setting abs_srcdir on MSYS2/MINGW" (#911) (#914)1138-4EB2019-09-021-6/+5
* Fix UPF (#905)1138-4EB2019-09-014-5/+21
* Fix configure (#911)1138-4EB2019-09-011-216/+222
* fix(configure): ignore line ending when comparing ghdl_version and libghdl_ve...1138-4EB2019-09-011-1/+1
* readme: fix refs to 'Building' (#909)1138-4EB2019-08-311-3/+3
* [doc] Update section 'Getting GHDL' (#906)1138-4EB2019-08-3121-425/+268
* Merge pull request #907 from sharkcz/llvm-fixtgingold2019-08-311-1/+1
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| * fix llvm build with synth enabledDan Horák2019-08-311-1/+1
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* synth: remove insert gate.Tristan Gingold2019-08-314-70/+0
* synth: improve synth_uresize.Tristan Gingold2019-08-313-26/+50
* synth: elab subprogram interfaces subtypeTristan Gingold2019-08-311-2/+13
* [PATCH] synth-environment: fix thinkos.Tristan Gingold2019-08-318-15/+231
* synth: add physical division (#904)tgingold2019-08-303-1/+36
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| * testsuite/synth: added test for the physical divisionMartin Doerfelt2019-08-302-0/+25
| * synth: added division of physical typeMartin Doerfelt2019-08-301-1/+11
* | synth: add support for --synth on llvm, link with -lm.Tristan Gingold2019-08-302-0/+6
* | synth: fix type elaboration of interfaces.Tristan Gingold2019-08-301-2/+0
* | synth: remove unused const gates.Tristan Gingold2019-08-302-13/+5
* | vhdl-annotations: ignore conditional variable assignment.Tristan Gingold2019-08-301-1/+2
* | vhdl-annotate: handle shared anonymous subtype in interfaces.Tristan Gingold2019-08-301-1/+4
* | synth: ignore report statement.Tristan Gingold2019-08-301-0/+2
* | vhdl: recognize ieee.numeric_std std_match.Tristan Gingold2019-08-304-196/+241
* | std_names: add std_matchTristan Gingold2019-08-302-3/+5
* | vhdl: recognize 1164 condition operator, handle in synth.Tristan Gingold2019-08-305-114/+137
* | synth: handle enumeration subtype in ranges.Tristan Gingold2019-08-301-1/+2
* | synth: fix named association in record aggregate.Tristan Gingold2019-08-301-1/+3
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* testsuite/synth: add testcase for records. Temporary disable stmt01Tristan Gingold2019-08-295-0/+168
* synth: add support for record types.Tristan Gingold2019-08-2913-82/+361
* synth: Integer operators (#902)marph912019-08-283-0/+47
* testsuite/synth: testcase for conditional signal assignment.Tristan Gingold2019-08-273-0/+61
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