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| author | Tristan Gingold <tgingold@free.fr> | 2019-09-04 07:42:31 +0200 |
|---|---|---|
| committer | Tristan Gingold <tgingold@free.fr> | 2019-09-04 07:42:31 +0200 |
| commit | b790578d72b1975423c9a9b3ce17f6fd9f12d2f9 (patch) | |
| tree | f5e9f65b15461ce3a1098b24242286bf355bdf65 | |
| parent | f6430e5443f35716f796d325df8dc79565310b16 (diff) | |
| download | ghdl-b790578d72b1975423c9a9b3ce17f6fd9f12d2f9.tar.gz ghdl-b790578d72b1975423c9a9b3ce17f6fd9f12d2f9.tar.bz2 ghdl-b790578d72b1975423c9a9b3ce17f6fd9f12d2f9.zip | |
synth: handle large width in get_net.
| -rw-r--r-- | src/synth/synth-context.adb | 14 | ||||
| -rw-r--r-- | src/synth/synth-stmts.adb | 4 |
2 files changed, 14 insertions, 4 deletions
diff --git a/src/synth/synth-context.adb b/src/synth/synth-context.adb index ea7e06905..2d274e051 100644 --- a/src/synth/synth-context.adb +++ b/src/synth/synth-context.adb @@ -256,8 +256,10 @@ package body Synth.Context is type Digit_Index is new Natural; type Logvec_Array is array (Digit_Index range <>) of Logic_32; + type Logvec_Array_Acc is access Logvec_Array; - -- type Logvec_Array_Acc is access Logvec_Array; + procedure Free_Logvec_Array is new Ada.Unchecked_Deallocation + (Logvec_Array, Logvec_Array_Acc); procedure Value2net (Val : Value_Acc; Vec : in out Logvec_Array; @@ -391,8 +393,14 @@ package body Synth.Context is Res : Net; begin if Nd > 64 then - -- TODO: Alloc on the heap. - raise Internal_Error; + declare + Vecp : Logvec_Array_Acc; + begin + Vecp := new Logvec_Array'(0 .. Nd - 1 => (0, 0)); + Value2net (Val, W, Vecp.all, Res); + Free_Logvec_Array (Vecp); + return Res; + end; else declare Vec : Logvec_Array (0 .. Nd - 1) := (others => (0, 0)); diff --git a/src/synth/synth-stmts.adb b/src/synth/synth-stmts.adb index dc61e4ce9..9c309345e 100644 --- a/src/synth/synth-stmts.adb +++ b/src/synth/synth-stmts.adb @@ -1262,7 +1262,9 @@ package body Synth.Stmts is exit; when Iir_Kind_Procedure_Call_Statement => Synth_Procedure_Call (Syn_Inst, Stmt); - when Iir_Kind_Report_Statement => + when Iir_Kind_Report_Statement + | Iir_Kind_Assertion_Statement => + -- TODO ? null; when others => Error_Kind ("synth_sequential_statements", Stmt); |