| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| ... | |
| * | vhdl: rename Cover_Statement to Cover_Directive. | Tristan Gingold | 2019-07-04 | 18 | -60/+60 |
| * | parse: improve error message for incorrect use of '!'. | Tristan Gingold | 2019-07-04 | 1 | -0/+4 |
| * | vhdl: parse and analyze restrict directive. | Tristan Gingold | 2019-07-04 | 20 | -130/+357 |
| * | Move pnodes.py.py to xtools directory. | Tristan Gingold | 2019-07-04 | 2 | -4/+1 |
| * | synth: handle vhdl2008 std_logic_1164, handle anonymous_signal. | Tristan Gingold | 2019-07-04 | 5 | -17/+30 |
| * | synth: emit an error for non-constant bounds. | Tristan Gingold | 2019-07-04 | 1 | -0/+4 |
| * | synth: ignore non object aliases. | Tristan Gingold | 2019-07-03 | 1 | -0/+2 |
| * | Add test for previous commit. | Tristan Gingold | 2019-07-03 | 2 | -0/+38 |
| * | vhdl: translate anonymous_signal_declaration. | Tristan Gingold | 2019-07-03 | 4 | -9/+8 |
| * | testsuite: add a case for previous commit. | Tristan Gingold | 2019-07-03 | 2 | -0/+47 |
| * | vhdl: avoid a crash on label parenthesis. | Tristan Gingold | 2019-07-03 | 1 | -0/+1 |
| * | vhdl: add anonymous_signal_declaration. | Tristan Gingold | 2019-07-03 | 20 | -526/+785 |
| * | synth: handle concurrent assertions. | Tristan Gingold | 2019-07-02 | 7 | -1/+50 |
| * | synth-expr: remove useless code. | Tristan Gingold | 2019-07-02 | 1 | -5/+1 |
| * | synth-decls: handle initial value for variables and | Tristan Gingold | 2019-07-02 | 1 | -5/+4 |
| * | netlists-disp_vhdl: handle xor. | Tristan Gingold | 2019-07-02 | 1 | -0/+2 |
| * | synth: fix Idff; fix 'edge and enable'. | Tristan Gingold | 2019-07-02 | 2 | -9/+6 |
| * | libghdlsynth: do not depend on ghdlsimul. | Tristan Gingold | 2019-07-02 | 1 | -3/+10 |
| * | ghdlsynth_gates.h: rebuild. | Tristan Gingold | 2019-07-02 | 1 | -29/+33 |
| * | ghdllocal: fix a typo in an error message. | Tristan Gingold | 2019-07-02 | 1 | -1/+1 |
| * | Makefile: automatically rebuild ghdlsynth_gates.h. | Tristan Gingold | 2019-07-02 | 1 | -6/+13 |
| * | vhdl: adjust python pathes in Makefile. | Tristan Gingold | 2019-07-02 | 1 | -9/+11 |
| * | synth: destroy iterator after for-loop. | Tristan Gingold | 2019-07-01 | 6 | -10/+54 |
| * | synth: improve handling of dynamic slices, add a | Tristan Gingold | 2019-07-01 | 1 | -3/+30 |
| * | netlists-disp_vhdl: handle dyn_insert, fix mul. | Tristan Gingold | 2019-07-01 | 1 | -20/+36 |
| * | testsuite/synth: add arr01 | Tristan Gingold | 2019-07-01 | 7 | -0/+176 |
| * | synth: add dyn_insert module. | Tristan Gingold | 2019-07-01 | 7 | -28/+130 |
| * | netlists-dump: write const in hexa. | Tristan Gingold | 2019-07-01 | 1 | -7/+9 |
| * | netlists-disp_vhdl: handle numbers in disp_template. | Tristan Gingold | 2019-07-01 | 1 | -14/+22 |
| * | netlists: fix pasto in builders. | Tristan Gingold | 2019-07-01 | 1 | -1/+1 |
| * | synth: add types_utils package. | Tristan Gingold | 2019-07-01 | 3 | -3/+31 |
| * | ghdlsynth: add option to select the output format. | Tristan Gingold | 2019-07-01 | 1 | -6/+16 |
| * | ghdldrv: add comments, analyze files for --synth/-e | Tristan Gingold | 2019-07-01 | 3 | -1/+7 |
| * | Makefile: add grt-cdynload in clean-c | Tristan Gingold | 2019-07-01 | 1 | -1/+2 |
| * | testsuite/synth: add forloop2 test. | Tristan Gingold | 2019-07-01 | 3 | -0/+74 |
| * | vhdl: improve error message. | Tristan Gingold | 2019-07-01 | 1 | -2/+1 |
| * | synth: handle for-loop statements. | Tristan Gingold | 2019-07-01 | 2 | -1/+40 |
| * | netlists disp_vhdl: rewrite uextend. | Tristan Gingold | 2019-07-01 | 1 | -5/+7 |
| * | synth: handle more concat. | Tristan Gingold | 2019-06-30 | 1 | -0/+19 |
| * | testsuite/synth: add simple01 | Tristan Gingold | 2019-06-30 | 3 | -0/+64 |
| * | testsuite/synth: add testsuite.sh | Tristan Gingold | 2019-06-30 | 1 | -0/+53 |
| * | ghdlsimul: fix warning. | Tristan Gingold | 2019-06-30 | 1 | -1/+1 |
| * | synth: add ule, fix gate number. | Tristan Gingold | 2019-06-30 | 3 | -30/+41 |
| * | synth: handle more comparisons. | Tristan Gingold | 2019-06-30 | 1 | -11/+29 |
| * | vhdl: recognize more predefined std_logic_unsigned functions. | Tristan Gingold | 2019-06-30 | 2 | -0/+24 |
| * | testsuite/synth: add tests for previous commit. | Tristan Gingold | 2019-06-30 | 9 | -1/+381 |
| * | synth: handle various enum ranges for case stmts. | Tristan Gingold | 2019-06-30 | 1 | -4/+24 |
| * | testsuite/synth: add a test for previous commit. | Tristan Gingold | 2019-06-30 | 3 | -1/+83 |
| * | synth: handle 2 states fsms. | Tristan Gingold | 2019-06-30 | 1 | -1/+5 |
| * | netlists: add a comment. | Tristan Gingold | 2019-06-30 | 1 | -0/+11 |
