index
:
iCE40/ghdl
master
[no description]
about
summary
refs
log
tree
commit
diff
stats
log msg
author
committer
range
Commit message (
Collapse
)
Author
Age
Files
Lines
*
testsuite/synth: add a test for #2232
Tristan Gingold
2022-11-05
2
-0
/
+37
|
*
synth: rework memory inference. Fix #2232
Tristan Gingold
2022-11-05
3
-78
/
+233
|
*
netlists-builders: allow building mem_wr_sync without clk and en.
Tristan Gingold
2022-11-05
1
-4
/
+10
|
*
synth: infere a dff (instead of an idff) when the init value is X
Tristan Gingold
2022-11-03
2
-6
/
+21
|
*
testsuite/synth/issue2035: avoid warnings
Tristan Gingold
2022-11-02
1
-0
/
+2
|
*
testsuite/gna: add a test for #2238
Tristan Gingold
2022-11-02
2
-0
/
+27
|
*
vhdl-sem_expr(sem_qualified_expression): relax staticness rules.
Tristan Gingold
2022-11-02
1
-1
/
+11
|
|
|
|
Fix #2238
*
testsuite/synth: add tests for #2237
Tristan Gingold
2022-11-02
9
-0
/
+746
|
*
synth: handle bit/unsigned and bit/signed vhdl 08 operators.
Tristan Gingold
2022-11-02
1
-12
/
+36
|
|
|
|
Fix #2237
*
Add missing -g for generic override to CLI help for RUNOPTS (#2220)
svnesbo
2022-11-01
1
-0
/
+1
|
|
|
Co-authored-by: Simon Voigt Nesbo <Simon.Voigt.Nesbo@hvl.no>
*
testsuite/synth: add a test for #2231
Tristan Gingold
2022-10-30
3
-0
/
+90
|
*
netlists-inference: handle flip-flop with different patterns.
Tristan Gingold
2022-10-30
1
-23
/
+75
|
|
|
|
Fix #2231
*
netlists-gates: add a comment
Tristan Gingold
2022-10-30
1
-0
/
+1
|
*
testsuite/gna: add tests for #2233
Tristan Gingold
2022-10-29
5
-0
/
+137
|
*
vhdl-sem_names(sem_name_free): handle iir_kind_slice_name. For #2233
Tristan Gingold
2022-10-29
1
-0
/
+1
|
*
vhdl-evaluation: handle to_string_digits. For #2233
Tristan Gingold
2022-10-29
1
-5
/
+50
|
*
synth: internal refactoring
Tristan Gingold
2022-10-29
4
-121
/
+93
|
|
|
|
use memtyp for eval_static_predefined_function_call
*
elab-vhdl_types: abstract elab_floating_type_definition
Tristan Gingold
2022-10-29
1
-10
/
+15
|
*
testsuite/synth: add a test for #2234
Tristan Gingold
2022-10-29
4
-0
/
+775
|
*
synth: fix crash in disp_verilog. Fix #2234
Tristan Gingold
2022-10-29
1
-3
/
+8
|
*
synth: handle copyback associations in any order.
Tristan Gingold
2022-10-19
1
-12
/
+30
|
*
synth-vhdl_eval: handle std_logic_misc reduce functions
Tristan Gingold
2022-10-19
1
-0
/
+27
|
*
testsuite/synth: add tests for std_logic_misc reduce functions
Tristan Gingold
2022-10-19
4
-16
/
+90
|
*
synth-vhdl_oper: handle xor/nand/nor/xnor reduce from std_logic_misc
Tristan Gingold
2022-10-19
1
-16
/
+34
|
*
testsuite/synth: add a test for #2224
Tristan Gingold
2022-10-19
2
-0
/
+23
|
*
synth-vhdl_oper: handle and_reduce. Fix #2224
Tristan Gingold
2022-10-19
1
-1
/
+10
|
*
testsuite/synth: add a test for #2222
Tristan Gingold
2022-10-18
2
-0
/
+28
|
*
synth: extract elab-vhdl_utils from synth-vhdl_stmts.
Tristan Gingold
2022-10-18
3
-142
/
+241
|
|
|
|
Fix #2222
*
testsuite/gna: add test for #2221
Tristan Gingold
2022-10-18
2
-0
/
+42
|
*
vhdl-sem_assocs: handle association with external signal names.
Tristan Gingold
2022-10-18
4
-63
/
+77
|
|
|
|
Fix #2221
*
gha: disable macosx-12 build
Tristan Gingold
2022-10-17
1
-1
/
+1
|
*
workflows: adjust macosx deployment target
Tristan Gingold
2022-10-17
1
-1
/
+1
|
*
win64: fix FP argument passing
Tristan Gingold
2022-10-17
1
-2
/
+8
|
*
testsuite/gna: add a test for #2215
Tristan Gingold
2022-10-17
3
-0
/
+55
|
*
github action: set macosx deployment env variable
Tristan Gingold
2022-10-17
1
-0
/
+1
|
*
testsuite/gna: add a test for #2218
Tristan Gingold
2022-10-16
3
-0
/
+58
|
*
vhdl-sem_expr.adb: avoid crash after error on aggregate. Fix #2218
Tristan Gingold
2022-10-16
1
-0
/
+6
|
*
testsuite/gna: add a test for #2217
Tristan Gingold
2022-10-16
4
-0
/
+79
|
*
vhdl-sem_expr.adb(is_string_type): check character type.
Tristan Gingold
2022-10-16
1
-1
/
+3
|
|
|
|
Fix #2217
*
testsuite/gna: add a test for #2219
Tristan Gingold
2022-10-14
2
-0
/
+39
|
*
vhdl-parse.adb: handle external names as assignment target.
Tristan Gingold
2022-10-14
1
-2
/
+4
|
|
|
|
Fix #2219
*
synth: handle record conversion
Tristan Gingold
2022-10-14
1
-0
/
+3
|
*
synth-vhdl_expr: support alias in indexed names
Tristan Gingold
2022-10-14
1
-1
/
+2
|
*
synth: avoid extra conversion during alias elaboration
Tristan Gingold
2022-10-14
1
-6
/
+4
|
*
simul: fix spurious error about multiple drivers
Tristan Gingold
2022-10-14
1
-0
/
+2
|
*
simul: handle delayed attribute
Tristan Gingold
2022-10-14
2
-6
/
+66
|
*
synth: handle alias of access objects.
Tristan Gingold
2022-10-13
1
-1
/
+1
|
*
simul: handle last_event and last_active
Tristan Gingold
2022-10-13
3
-4
/
+114
|
*
elab-vhd_expr: handle more cases in exec_type_of_object
Tristan Gingold
2022-10-13
1
-1
/
+4
|
*
simul-vhdl_simul: keep default value of collapsed signals
Tristan Gingold
2022-10-13
1
-1
/
+10
|
[next]