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author | Tristan Gingold <tgingold@free.fr> | 2022-11-02 18:44:40 +0100 |
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committer | Tristan Gingold <tgingold@free.fr> | 2022-11-02 20:58:23 +0100 |
commit | 25fe65a7dd9172d4368ead88393c43c3f2329fdf (patch) | |
tree | b4bfbcc6100489171e714719a99a11b15b402e62 | |
parent | bf5c6cda62ba36320ac2b9f133757ed9c6b8e5a6 (diff) | |
download | ghdl-25fe65a7dd9172d4368ead88393c43c3f2329fdf.tar.gz ghdl-25fe65a7dd9172d4368ead88393c43c3f2329fdf.tar.bz2 ghdl-25fe65a7dd9172d4368ead88393c43c3f2329fdf.zip |
testsuite/gna: add a test for #2238
-rw-r--r-- | testsuite/gna/issue2238/port_map2.vhdl | 18 | ||||
-rwxr-xr-x | testsuite/gna/issue2238/testsuite.sh | 9 |
2 files changed, 27 insertions, 0 deletions
diff --git a/testsuite/gna/issue2238/port_map2.vhdl b/testsuite/gna/issue2238/port_map2.vhdl new file mode 100644 index 000000000..f2b215253 --- /dev/null +++ b/testsuite/gna/issue2238/port_map2.vhdl @@ -0,0 +1,18 @@ +library IEEE ; +use ieee.std_logic_1164.all ; +use ieee.numeric_std.all ; + +entity PortMap2 is +end entity PortMap2 ; +architecture t1 of PortMap2 is + component fred is + port (A : in signed(7 downto 0) ; B : out signed (7 downto 0) ) ; + end component fred ; + + signal Result : signed (7 downto 0) ; +begin + + fred1 : fred + port map (A => signed'("00001111"), B => Result ) ; + +end architecture t1 ; diff --git a/testsuite/gna/issue2238/testsuite.sh b/testsuite/gna/issue2238/testsuite.sh new file mode 100755 index 000000000..57621960b --- /dev/null +++ b/testsuite/gna/issue2238/testsuite.sh @@ -0,0 +1,9 @@ +#! /bin/sh + +. ../../testenv.sh + +analyze port_map2.vhdl + +clean + +echo "Test successful" |