| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | Merge branch 'clifford/dffsrfix' of https://github.com/YosysHQ/yosys into xaig | Eddie Hung | 2019-02-21 | 1 | -6/+7 |
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| | * | Fix opt_rmdff handling of $_DFFSR_???_ and $_DLATCHSR_???_, fixes #816 | Clifford Wolf | 2019-02-21 | 1 | -6/+7 |
| | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
| * | | ABC -> ABC9 | Eddie Hung | 2019-02-20 | 1 | -1/+1 |
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| * | | abc9 to disconnect mapped_mods POs correctly, and do not count $_NOT_ | Eddie Hung | 2019-02-20 | 1 | -21/+29 |
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| * | | lut/not/and suffix to be ${lut,not,and} | Eddie Hung | 2019-02-20 | 1 | -4/+4 |
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| * | | abc9 to cope with multiple modules | Eddie Hung | 2019-02-20 | 1 | -7/+11 |
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| * | | abc9 to use & syntax for -fast, and name fixes | Eddie Hung | 2019-02-20 | 1 | -5/+5 |
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| * | | abc9 to cope with indexed wires when creating $lut from $_NOT_ | Eddie Hung | 2019-02-19 | 1 | -1/+6 |
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| * | | abc9 to replace $_NOT_ with $lut | Eddie Hung | 2019-02-19 | 1 | -4/+39 |
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| * | | Get rid of debugging stuff in abc9 | Eddie Hung | 2019-02-16 | 1 | -6/+1 |
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| * | | abc9 to write_aiger with -O option, and ignore dummy outputs | Eddie Hung | 2019-02-16 | 1 | -2/+8 |
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| * | | abc9 to handle comb loops, cope with constant outputs, disconnect using new wire | Eddie Hung | 2019-02-16 | 1 | -4/+67 |
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| * | | expose command to not skip 'internal' wires beginning with '$' | Eddie Hung | 2019-02-16 | 1 | -1/+1 |
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| * | | abc9 to cope with non-wideports, count cells properly | Eddie Hung | 2019-02-16 | 1 | -11/+54 |
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| * | | Move lookup inside if | Eddie Hung | 2019-02-15 | 1 | -2/+2 |
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| * | | Refactor | Eddie Hung | 2019-02-15 | 1 | -29/+32 |
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| * | | Cope with width != 1 when re-mapping cells | Eddie Hung | 2019-02-15 | 1 | -11/+25 |
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| * | | abc9 to stitch results with CI/CO properly | Eddie Hung | 2019-02-15 | 1 | -16/+32 |
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| * | | Fix stitching | Eddie Hung | 2019-02-13 | 1 | -4/+4 |
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| * | | Merge remote-tracking branch 'origin/read_aiger' into xaig | Eddie Hung | 2019-02-13 | 1 | -0/+2 |
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| | * | | Missing headers for Xcode? | Eddie Hung | 2019-02-12 | 1 | -0/+2 |
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| * | | | Merge https://github.com/YosysHQ/yosys into xaig | Eddie Hung | 2019-02-13 | 1 | -1/+2 |
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| | * | | fsm_opt: Fix runtime error for FSMs without a reset state | David Shah | 2019-02-07 | 1 | -1/+2 |
| | |/ | | | | | | | Signed-off-by: David Shah <dave@ds0.me> | ||||
| * | | Rip out some more stuff | Eddie Hung | 2019-02-13 | 1 | -36/+0 |
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| * | | Rip out unused functions in abc9 | Eddie Hung | 2019-02-12 | 1 | -416/+61 |
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| * | | WIP for ABC with aiger | Eddie Hung | 2019-02-12 | 1 | -130/+19 |
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| * | | Compile abc9 | Eddie Hung | 2019-02-08 | 2 | -8/+9 |
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| * | | Copy abc.cc to abc9.cc | Eddie Hung | 2019-02-08 | 1 | -0/+1868 |
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| * | proc_clean: fix critical typo. | whitequark | 2019-01-23 | 1 | -1/+1 |
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| * | proc_clean: fix fully def check to consider compare/signal length. | whitequark | 2019-01-18 | 1 | -1/+7 |
| | | | | | Fixes #790. | ||||
| * | flowmap: clean up terminology. | whitequark | 2019-01-08 | 1 | -17/+18 |
| | | | | | | | | | | | * "map": group gates into LUTs; * "pack": replace gates with LUTs. This is important because we have FlowMap and DF-Map, and currently our messages are ambiguous. Also clean up some other log messages while we're at it. | ||||
| * | flowmap: implement depth relaxation. | whitequark | 2019-01-08 | 7 | -22/+762 |
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| * | Bugfix in $memrd sharing | Clifford Wolf | 2019-01-07 | 1 | -2/+6 |
| | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
| * | Merge pull request #782 from whitequark/flowmap_dfs | Clifford Wolf | 2019-01-07 | 3 | -124/+243 |
| |\ | | | | | flowmap: construct a max-volume max-flow min-cut, not just any one | ||||
| | * | flowmap: construct a max-volume max-flow min-cut, not just any one. | whitequark | 2019-01-06 | 1 | -7/+10 |
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| | * | flowmap: add -minlut option, to allow postprocessing with opt_lut. | whitequark | 2019-01-04 | 1 | -7/+21 |
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| | * | flowmap: cleanup for clarity. NFCI. | whitequark | 2019-01-04 | 3 | -107/+179 |
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| | * | flowmap: improve debug graph output. NFC. | whitequark | 2019-01-04 | 1 | -47/+76 |
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| | * | flowmap: add link to longer version of paper. NFC. | whitequark | 2019-01-04 | 1 | -2/+3 |
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| * | | Switch "bugpoint" from system() to run_command() | Clifford Wolf | 2019-01-07 | 1 | -1/+1 |
| | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
| * | | bugpoint: new pass. | whitequark | 2019-01-07 | 2 | -1/+370 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A typical use of `bugpoint` would involve a script with a pass under test, e.g.: flowmap -relax -optarea 100 and would be invoked as: bugpoint -yosys ./yosys -script flowmap.ys -clean -cells This replaces the current design with the minimal design that still crashes the `flowmap.ys` script. `bugpoint` can also be used to perform generic design minimization using `select`, e.g. the following script: select i:* %x t:$_MUX_ %i -assert-max 0 would remove all parts of the design except for an unbroken path from an input to an output port that goes through exactly one $_MUX_ cell. (The condition is inverted.) | ||||
| * | | Rename cells based on the wires they drive. | Scott Mansell | 2019-01-06 | 1 | -0/+66 |
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| * | Merge pull request #775 from whitequark/opt_flowmap | Clifford Wolf | 2019-01-03 | 3 | -1/+875 |
| |\ | | | | | flowmap: new techmap pass | ||||
| | * | flowmap: new techmap pass. | whitequark | 2019-01-03 | 3 | -1/+875 |
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| * | | Merge pull request #770 from whitequark/opt_expr_cmp | Clifford Wolf | 2019-01-02 | 1 | -97/+134 |
| |\ \ | |/ |/| | opt_expr: refactor and improve simplification of comparisons | ||||
| | * | opt_expr: improve simplification of comparisons with large constants. | whitequark | 2019-01-02 | 1 | -70/+47 |
| | | | | | | | | | | | | | | | | | | | | | | | | | The idea behind this simplification is that a N-bit signal X being compared with an M-bit constant where M>N and the constant has Nth or higher bit set, it either always succeeds or always fails. However, the existing implementation only worked with one-hot signals for some reason. It also printed incorrect messages. This commit adjusts the simplification to have as much power as possible, and fixes other bugs. | ||||
| | * | opt_expr: refactor simplification of unsigned X<onehot and X>=onehot. NFCI. | whitequark | 2019-01-02 | 1 | -31/+37 |
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| | * | opt_expr: refactor simplification of signed X>=0 and X<0. NFCI. | whitequark | 2019-01-02 | 1 | -24/+26 |
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| | * | opt_expr: simplify any unsigned comparisons with all-0 and all-1. | whitequark | 2019-01-02 | 1 | -17/+69 |
| | | | | | | | | | | | | | Before this commit, only unsigned comparisons with all-0 would be simplified. This commit also makes the code handling such comparisons to be more rigorous and not abort on unexpected input. | ||||
| * | | Merge pull request #750 from Icenowy/anlogic-ff-init | Clifford Wolf | 2019-01-02 | 1 | -3/+30 |
| |\ \ | | | | | | | Initialization of Anlogic DFFs | ||||
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index : iCE40/yosys | |
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