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* Merge branch 'clifford/dffsrfix' of https://github.com/YosysHQ/yosys into xaigEddie Hung2019-02-211-6/+7
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| * Fix opt_rmdff handling of $_DFFSR_???_ and $_DLATCHSR_???_, fixes #816Clifford Wolf2019-02-211-6/+7
* | ABC -> ABC9Eddie Hung2019-02-201-1/+1
* | abc9 to disconnect mapped_mods POs correctly, and do not count $_NOT_Eddie Hung2019-02-201-21/+29
* | lut/not/and suffix to be ${lut,not,and}Eddie Hung2019-02-201-4/+4
* | abc9 to cope with multiple modulesEddie Hung2019-02-201-7/+11
* | abc9 to use & syntax for -fast, and name fixesEddie Hung2019-02-201-5/+5
* | abc9 to cope with indexed wires when creating $lut from $_NOT_Eddie Hung2019-02-191-1/+6
* | abc9 to replace $_NOT_ with $lutEddie Hung2019-02-191-4/+39
* | Get rid of debugging stuff in abc9Eddie Hung2019-02-161-6/+1
* | abc9 to write_aiger with -O option, and ignore dummy outputsEddie Hung2019-02-161-2/+8
* | abc9 to handle comb loops, cope with constant outputs, disconnect using new wireEddie Hung2019-02-161-4/+67
* | expose command to not skip 'internal' wires beginning with '$'Eddie Hung2019-02-161-1/+1
* | abc9 to cope with non-wideports, count cells properlyEddie Hung2019-02-161-11/+54
* | Move lookup inside ifEddie Hung2019-02-151-2/+2
* | RefactorEddie Hung2019-02-151-29/+32
* | Cope with width != 1 when re-mapping cellsEddie Hung2019-02-151-11/+25
* | abc9 to stitch results with CI/CO properlyEddie Hung2019-02-151-16/+32
* | Fix stitchingEddie Hung2019-02-131-4/+4
* | Merge remote-tracking branch 'origin/read_aiger' into xaigEddie Hung2019-02-131-0/+2
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| * | Missing headers for Xcode?Eddie Hung2019-02-121-0/+2
* | | Merge https://github.com/YosysHQ/yosys into xaigEddie Hung2019-02-131-1/+2
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| * | fsm_opt: Fix runtime error for FSMs without a reset stateDavid Shah2019-02-071-1/+2
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* | Rip out some more stuffEddie Hung2019-02-131-36/+0
* | Rip out unused functions in abc9Eddie Hung2019-02-121-416/+61
* | WIP for ABC with aigerEddie Hung2019-02-121-130/+19
* | Compile abc9Eddie Hung2019-02-082-8/+9
* | Copy abc.cc to abc9.ccEddie Hung2019-02-081-0/+1868
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* proc_clean: fix critical typo.whitequark2019-01-231-1/+1
* proc_clean: fix fully def check to consider compare/signal length.whitequark2019-01-181-1/+7
* flowmap: clean up terminology.whitequark2019-01-081-17/+18
* flowmap: implement depth relaxation.whitequark2019-01-087-22/+762
* Bugfix in $memrd sharingClifford Wolf2019-01-071-2/+6
* Merge pull request #782 from whitequark/flowmap_dfsClifford Wolf2019-01-073-124/+243
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| * flowmap: construct a max-volume max-flow min-cut, not just any one.whitequark2019-01-061-7/+10
| * flowmap: add -minlut option, to allow postprocessing with opt_lut.whitequark2019-01-041-7/+21
| * flowmap: cleanup for clarity. NFCI.whitequark2019-01-043-107/+179
| * flowmap: improve debug graph output. NFC.whitequark2019-01-041-47/+76
| * flowmap: add link to longer version of paper. NFC.whitequark2019-01-041-2/+3
* | Switch "bugpoint" from system() to run_command()Clifford Wolf2019-01-071-1/+1
* | bugpoint: new pass.whitequark2019-01-072-1/+370
* | Rename cells based on the wires they drive.Scott Mansell2019-01-061-0/+66
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* Merge pull request #775 from whitequark/opt_flowmapClifford Wolf2019-01-033-1/+875
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| * flowmap: new techmap pass.whitequark2019-01-033-1/+875
* | Merge pull request #770 from whitequark/opt_expr_cmpClifford Wolf2019-01-021-97/+134
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| * opt_expr: improve simplification of comparisons with large constants.whitequark2019-01-021-70/+47
| * opt_expr: refactor simplification of unsigned X<onehot and X>=onehot. NFCI.whitequark2019-01-021-31/+37
| * opt_expr: refactor simplification of signed X>=0 and X<0. NFCI.whitequark2019-01-021-24/+26
| * opt_expr: simplify any unsigned comparisons with all-0 and all-1.whitequark2019-01-021-17/+69
* | Merge pull request #750 from Icenowy/anlogic-ff-initClifford Wolf2019-01-021-3/+30
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